### llvm.vp.reduce.smax usage example Source: https://llvm.org/docs/LangRef.html Example showing how to use llvm.vp.reduce.smax and its equivalence to masking with the neutral value INT_MIN (-128) and then performing a non-predicated reduction and max with the start value. ```llvm %r = call i8 @llvm.vp.reduce.smax.v4i8(i8 %start, <4 x i8> %a, <4 x i1> %mask, i32 %evl) ; %r is equivalent to %also.r, where lanes greater than or equal to %evl ; are treated as though %mask were false for those lanes. %masked.a = select <4 x i1> %mask, <4 x i8> %a, <4 x i8> %reduction = call i8 @llvm.vector.reduce.smax.v4i8(<4 x i8> %masked.a) %also.r = call i8 @llvm.smax.i8(i8 %reduction, i8 %start) ``` -------------------------------- ### llvm.vp.reduce.smin usage example Source: https://llvm.org/docs/LangRef.html Example showing how to use llvm.vp.reduce.smin and its equivalence to masking with the neutral value INT_MAX (127) and then performing a non-predicated reduction and min with the start value. ```llvm %r = call i8 @llvm.vp.reduce.smin.v4i8(i8 %start, <4 x i8> %a, <4 x i1> %mask, i32 %evl) ; %r is equivalent to %also.r, where lanes greater than or equal to %evl ; are treated as though %mask were false for those lanes. %masked.a = select <4 x i1> %mask, <4 x i8> %a, <4 x i8> %reduction = call i8 @llvm.vector.reduce.smin.v4i8(<4 x i8> %masked.a) %also.r = call i8 @llvm.smin.i8(i8 %reduction, i8 %start) ``` -------------------------------- ### llvm.vp.reduce.xor usage example Source: https://llvm.org/docs/LangRef.html Example showing how llvm.vp.reduce.xor is equivalent to masking the vector with the neutral value 0, performing a regular vector reduce.xor, and XOR-ing with the start value. Disabled lanes are treated as containing 0, and a zero vector length returns the start value. ```llvm %r = call i32 @llvm.vp.reduce.xor.v4i32(i32 %start, <4 x i32> %a, <4 x i1> %mask, i32 %evl) ; %r is equivalent to %also.r, where lanes greater than or equal to %evl ; are treated as though %mask were false for those lanes. %masked.a = select <4 x i1> %mask, <4 x i32> %a, <4 x i32> %reduction = call i32 @llvm.vector.reduce.xor.v4i32(<4 x i32> %masked.a) %also.r = xor i32 %reduction, %start ``` -------------------------------- ### llvm.vp.reduce.or usage example Source: https://llvm.org/docs/LangRef.html Example showing how llvm.vp.reduce.or is equivalent to masking the vector with the neutral value 0, performing a regular vector reduce.or, and OR-ing with the start value. Disabled lanes are treated as containing 0, and a zero vector length returns the start value. ```llvm %r = call i32 @llvm.vp.reduce.or.v4i32(i32 %start, <4 x i32> %a, <4 x i1> %mask, i32 %evl) ; %r is equivalent to %also.r, where lanes greater than or equal to %evl ; are treated as though %mask were false for those lanes. %masked.a = select <4 x i1> %mask, <4 x i32> %a, <4 x i32> %reduction = call i32 @llvm.vector.reduce.or.v4i32(<4 x i32> %masked.a) %also.r = or i32 %reduction, %start ``` -------------------------------- ### llvm.vp.reduce.fmin usage example Source: https://llvm.org/docs/LangRef.html Example showing how to use llvm.vp.reduce.fmin and how it is equivalent to masking the vector with QNAN, performing a vector reduce.fmin, and combining with the start value via minnum. The comment explains that lanes beyond the explicit vector length are treated as masked off. ```llvm %r = call float @llvm.vp.reduce.fmin.v4f32(float %start, <4 x float> %a, <4 x i1> %mask, i32 %evl) ; %r is equivalent to %also.r, where lanes greater than or equal to %evl ; are treated as though %mask were false for those lanes. %masked.a = select <4 x i1> %mask, <4 x float> %a, <4 x float> %reduction = call float @llvm.vector.reduce.fmin.v4f32(<4 x float> %masked.a) %also.r = call float @llvm.minnum.f32(float %reduction, float %start) ``` -------------------------------- ### llvm.vector.reduce.fmul.* Examples Source: https://llvm.org/docs/LangRef.html Example calls to llvm.vector.reduce.fmul.v4f32. The first uses the 'reassoc' flag for a relaxed reduction with 1.0 as the start value; the second performs a sequential reduction with a start value. ```llvm %unord = call reassoc float @llvm.vector.reduce.fmul.v4f32(float 1.0, <4 x float> %input) ; relaxed reduction %ord = call float @llvm.vector.reduce.fmul.v4f32(float %start_value, <4 x float> %input) ; sequential reduction ``` -------------------------------- ### llvm.vp.reduce.fminimum Example Usage Source: https://llvm.org/docs/LangRef.html Example showing how to use llvm.vp.reduce.fminimum and its equivalence to masking with infinity and using llvm.vector.reduce.fminimum and llvm.minimum. ```llvm %r = call float @llvm.vp.reduce.fminimum.v4f32(float %start, <4 x float> %a, <4 x i1> %mask, i32 %evl) ; %r is equivalent to %also.r, where lanes greater than or equal to %evl ; are treated as though %mask were false for those lanes. %masked.a = select <4 x i1> %mask, <4 x float> %a, <4 x float> %reduction = call float @llvm.vector.reduce.fminimum.v4f32(<4 x float> %masked.a) %also.r = call float @llvm.minimum.f32(float %reduction, float %start) ``` -------------------------------- ### llvm.vp.reduce.fmax usage example Source: https://llvm.org/docs/LangRef.html Example showing how to use llvm.vp.reduce.fmax and how it is equivalent to masking the vector with QNAN, performing a vector reduce.fmax, and combining with the start value via maxnum. The comment explains that lanes beyond the explicit vector length are treated as masked off. ```llvm %r = call float @llvm.vp.reduce.fmax.v4f32(float %start, <4 x float> %a, <4 x i1> %mask, i32 %evl) ; %r is equivalent to %also.r, where lanes greater than or equal to %evl ; are treated as though %mask were false for those lanes. %masked.a = select <4 x i1> %mask, <4 x float> %a, <4 x float> %reduction = call float @llvm.vector.reduce.fmax.v4f32(<4 x float> %masked.a) %also.r = call float @llvm.maxnum.f32(float %reduction, float %start) ``` -------------------------------- ### add instruction example Source: https://llvm.org/docs/LangRef.html Example of the add instruction summing an integer constant and a variable. ```llvm = add i32 4, %var ; yields i32:result = 4 + %var ``` -------------------------------- ### llvm.experimental.vp.splice Example Usage Source: https://llvm.org/docs/LangRef.html Examples illustrating the behavior of llvm.experimental.vp.splice with positive and negative immediate offsets, showing the resulting vectors. ```llvm llvm.experimental.vp.splice(, , 1, 2, 3); ==> index llvm.experimental.vp.splice(, , -2, 3, 2); ==> trailing elements ``` -------------------------------- ### sitofp instruction examples Source: https://llvm.org/docs/LangRef.html Examples of the 'sitofp' instruction converting signed integers to floating-point values. ```llvm %X = sitofp i32 257 to float ; yields float:257.0 %Y = sitofp i8 -1 to double ; yields double:-1.0 ``` -------------------------------- ### llvm.vp.reduce.add example Source: https://llvm.org/docs/LangRef.html Example usage of llvm.vp.reduce.add. Disabled lanes are treated as containing the neutral value 0; if the vector length is zero, the result equals start_value. The example shows equivalence to masking with zeroinitializer and using llvm.vector.reduce.add. ```llvm %r = call i32 @llvm.vp.reduce.add.v4i32(i32 %start, <4 x i32> %a, <4 x i1> %mask, i32 %evl) ; %r is equivalent to %also.r, where lanes greater than or equal to %evl ; are treated as though %mask were false for those lanes. %masked.a = select <4 x i1> %mask, <4 x i32> %a, <4 x i32> zeroinitializer %reduction = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> %masked.a) %also.r = add i32 %reduction, %start ``` -------------------------------- ### LLVM "hello world" module example Source: https://llvm.org/docs/LangRef.html Example of a complete LLVM module for a "hello world" program. It includes a global string constant, an external declaration of the puts function, a main function definition that calls puts, and named metadata. This illustrates the basic structure of an LLVM module with global values, functions, and metadata. ```llvm ; Declare the string constant as a global constant. @.str = private unnamed_addr constant [13 x i8] c"hello world\0A\00" ; External declaration of the puts function declare i32 @puts(ptr captures(none)) nounwind ; Definition of main function define i32 @main() { ; Call puts function to write out the string to stdout. call i32 @puts(ptr @.str) ret i32 0 } ; Named metadata !0 = !{i32 42, null, !"string"} !foo = !{!0} ``` -------------------------------- ### llvm.vp.udiv example call and expansion Source: https://llvm.org/docs/LangRef.html Example call to llvm.vp.udiv.v4i32 and its equivalent expansion using udiv and select. For all lanes below %evl, %r is lane-wise equivalent to %also.r; disabled lanes produce poison. ```llvm %r = call <4 x i32> @llvm.vp.udiv.v4i32(<4 x i32> %a, <4 x i32> %b, <4 x i1> %mask, i32 %evl) ;; For all lanes below %evl, %r is lane-wise equivalent to %also.r %t = udiv <4 x i32> %a, %b %also.r = select <4 x i1> %mask, <4 x i32> %t, <4 x i32> poison ``` -------------------------------- ### llvm.vector.reduce.fadd.* Examples Source: https://llvm.org/docs/LangRef.html Example calls to llvm.vector.reduce.fadd.v4f32. The first uses the 'reassoc' flag for a relaxed reduction with -0.0 as the start value; the second performs a sequential reduction with a start value. ```llvm %unord = call reassoc float @llvm.vector.reduce.fadd.v4f32(float -0.0, <4 x float> %input) ; relaxed reduction %ord = call float @llvm.vector.reduce.fadd.v4f32(float %start_value, <4 x float> %input) ; sequential reduction ``` -------------------------------- ### llvm.vp.sdiv example call and expansion Source: https://llvm.org/docs/LangRef.html Example call to llvm.vp.sdiv.v4i32 and its equivalent expansion using sdiv and select. For all lanes below %evl, %r is lane-wise equivalent to %also.r; disabled lanes produce poison. ```llvm %r = call <4 x i32> @llvm.vp.sdiv.v4i32(<4 x i32> %a, <4 x i32> %b, <4 x i1> %mask, i32 %evl) ;; For all lanes below %evl, %r is lane-wise equivalent to %also.r %t = sdiv <4 x i32> %a, %b %also.r = select <4 x i1> %mask, <4 x i32> %t, <4 x i32> poison ``` -------------------------------- ### llvm.vp.reduce.umax example Source: https://llvm.org/docs/LangRef.html Example usage of llvm.vp.reduce.umax. Disabled lanes are treated as containing the neutral value 0. The example shows equivalence to masking the vector with 0, performing an unpredicated reduction, and combining with the start value using llvm.umax. ```llvm %r = call i32 @llvm.vp.reduce.umax.v4i32(i32 %start, <4 x i32> %a, <4 x i1> %mask, i32 %evl) ; %r is equivalent to %also.r, where lanes greater than or equal to %evl ; are treated as though %mask were false for those lanes. %masked.a = select <4 x i1> %mask, <4 x i32> %a, <4 x i32> %reduction = call i32 @llvm.vector.reduce.umax.v4i32(<4 x i32> %masked.a) %also.r = call i32 @llvm.umax.i32(i32 %reduction, i32 %start) ``` -------------------------------- ### llvm.vp.store example with align attribute Source: https://llvm.org/docs/LangRef.html Example showing the equivalence between llvm.vp.store with an align attribute and llvm.masked.store with an explicit alignment argument. The vp.store call is lane-wise equivalent to the masked.store call for lanes below %evl. ```llvm call void @llvm.vp.store.v8i8.p0(<8 x i8> %val, ptr align 4 %ptr, <8 x i1> %mask, i32 %evl) ;; For all lanes below %evl, the call above is lane-wise equivalent to the call below. call void @llvm.masked.store.v8i8.p0(<8 x i8> %val, ptr %ptr, i32 4, <8 x i1> %mask) ``` -------------------------------- ### landingpad instruction examples Source: https://llvm.org/docs/LangRef.html Three example landingpad instructions: one that catches an integer, one that is a cleanup, and one that catches an integer while filtering to only allow a double to be thrown. ```llvm ;; A landing pad which can catch an integer. %res = landingpad { ptr, i32 } catch ptr @_ZTIi ;; A landing pad that is a cleanup. %res = landingpad { ptr, i32 } cleanup ;; A landing pad which can catch an integer and can only throw a double. %res = landingpad { ptr, i32 } catch ptr @_ZTIi filter [1 x ptr] [ptr @_ZTId] ``` -------------------------------- ### Properly nested llvm.call.preallocated.setup calls Source: https://llvm.org/docs/LangRef.html Shows properly nested calls to llvm.call.preallocated.setup. The second setup token is used before the first, demonstrating the required nesting order. ```llvm %t1 = call token @llvm.call.preallocated.setup(i32 0) %t2 = call token @llvm.call.preallocated.setup(i32 0) call void foo() ["preallocated"(token %t2)] call void foo() ["preallocated"(token %t1)] ``` -------------------------------- ### llvm.vp.reduce.umin example Source: https://llvm.org/docs/LangRef.html Example usage of llvm.vp.reduce.umin. Disabled lanes are treated as containing the neutral value UINT_MAX (-1). The example shows equivalence to masking the vector with -1, performing an unpredicated reduction, and combining with the start value using llvm.umin. ```llvm %r = call i32 @llvm.vp.reduce.umin.v4i32(i32 %start, <4 x i32> %a, <4 x i1> %mask, i32 %evl) ; %r is equivalent to %also.r, where lanes greater than or equal to %evl ; are treated as though %mask were false for those lanes. %masked.a = select <4 x i1> %mask, <4 x i32> %a, <4 x i32> %reduction = call i32 @llvm.vector.reduce.umin.v4i32(<4 x i32> %masked.a) %also.r = call i32 @llvm.umin.i32(i32 %reduction, i32 %start) ``` -------------------------------- ### llvm.vp.merge example call and expansion Source: https://llvm.org/docs/LangRef.html Example call to llvm.vp.merge.v4i32 followed by an equivalent expansion using insertelement, shufflevector, icmp, and, and select. The expansion shows that lanes at and above the pivot are taken from %on_false. ```llvm %r = call <4 x i32> @llvm.vp.merge.v4i32(<4 x i1> %cond, <4 x i32> %on_true, <4 x i32> %on_false, i32 %pivot) ;;; Expansion. ;; Lanes at and above %pivot are taken from %on_false %atfirst = insertelement <4 x i32> poison, i32 %pivot, i64 0 %splat = shufflevector <4 x i32> %atfirst, <4 x i32> poison, <4 x i32> zeroinitializer %pivotmask = icmp ult <4 x i32> , <4 x i32> %splat %mergemask = and <4 x i1> %cond, <4 x i1> %pivotmask %also.r = select <4 x i1> %mergemask, <4 x i32> %on_true, <4 x i32> %on_false ``` -------------------------------- ### llvm.vp.reduce.and example with mask and neutral value Source: https://llvm.org/docs/LangRef.html Example showing how llvm.vp.reduce.and behaves: disabled lanes are treated as neutral value -1 (UINT_MAX), and the result is equivalent to masking the vector, reducing with llvm.vector.reduce.and, then ANDing with the start value. ```llvm %r = call i32 @llvm.vp.reduce.and.v4i32(i32 %start, <4 x i32> %a, <4 x i1> %mask, i32 %evl) ; %r is equivalent to %also.r, where lanes greater than or equal to %evl ; are treated as though %mask were false for those lanes. %masked.a = select <4 x i1> %mask, <4 x i32> %a, <4 x i32> %reduction = call i32 @llvm.vector.reduce.and.v4i32(<4 x i32> %masked.a) %also.r = and i32 %reduction, %start ``` -------------------------------- ### llvm.vp.reduce.mul example with masked lanes Source: https://llvm.org/docs/LangRef.html Example usage of llvm.vp.reduce.mul.v4i32 showing equivalence to the unpredicated llvm.vector.reduce.mul with disabled lanes replaced by the neutral value 1, then multiplied by the start value. The comment explains that lanes >= %evl are treated as masked off. ```llvm %r = call i32 @llvm.vp.reduce.mul.v4i32(i32 %start, <4 x i32> %a, <4 x i1> %mask, i32 %evl) ; %r is equivalent to %also.r, where lanes greater than or equal to %evl ; are treated as though %mask were false for those lanes. %masked.a = select <4 x i1> %mask, <4 x i32> %a, <4 x i32> %reduction = call i32 @llvm.vector.reduce.mul.v4i32(<4 x i32> %masked.a) %also.r = mul i32 %reduction, %start ``` -------------------------------- ### llvm.vp.urem example Source: https://llvm.org/docs/LangRef.html Example usage of llvm.vp.urem. The result on disabled lanes is poison; the example shows equivalence to a select-based implementation for lanes below %evl. ```llvm %r = call <4 x i32> @llvm.vp.urem.v4i32(<4 x i32> %a, <4 x i32> %b, <4 x i1> %mask, i32 %evl) ;; For all lanes below %evl, %r is lane-wise equivalent to %also.r %t = urem <4 x i32> %a, %b %also.r = select <4 x i1> %mask, <4 x i32> %t, <4 x i32> poison ``` -------------------------------- ### llvm.vp.srem example Source: https://llvm.org/docs/LangRef.html Example usage of llvm.vp.srem. The result on disabled lanes is poison; the example shows equivalence to a select-based implementation for lanes below %evl. ```llvm %r = call <4 x i32> @llvm.vp.srem.v4i32(<4 x i32> %a, <4 x i32> %b, <4 x i1> %mask, i32 %evl) ;; For all lanes below %evl, %r is lane-wise equivalent to %also.r %t = srem <4 x i32> %a, %b %also.r = select <4 x i1> %mask, <4 x i32> %t, <4 x i32> poison ``` -------------------------------- ### resume instruction example Source: https://llvm.org/docs/LangRef.html Example of the resume instruction, which resumes propagation of an in-flight exception whose unwinding was interrupted with a landingpad instruction. ```llvm resume { ptr, i32 } %exn ``` -------------------------------- ### DIObjCProperty example Source: https://llvm.org/docs/LangRef.html Example of a DIObjCProperty node, which represents an Objective-C property node. ```llvm !3 = !DIObjCProperty(name: "foo", file: !1, line: 7, setter: "setFoo", getter: "getFoo", attributes: 7, type: !2) ``` -------------------------------- ### fence instruction examples Source: https://llvm.org/docs/LangRef.html Examples of fence instructions with different orderings and syncscope arguments. The first uses acquire ordering, the second uses seq_cst with a singlethread syncscope, and the third uses seq_cst with an agent syncscope. ```llvm fence acquire ; yields void fence syncscope("singlethread") seq_cst ; yields void fence syncscope("agent") seq_cst ; yields void ``` -------------------------------- ### extractvalue Example Source: https://llvm.org/docs/LangRef.html Example of extractvalue extracting the first element (i32) from a struct aggregate. ```llvm = extractvalue {i32, float} %agg, 0 ; yields i32 ```