### BlockConfiguration Example Source: https://ghdl.github.io/ghdl/pyGHDL/pyGHDL.dom.Configuration.html An example showing the VHDL syntax for a block configuration. ```vhdl for rtl -- ^^^ <- Block end for; ``` -------------------------------- ### ConfigurationInstantiation Example Source: https://ghdl.github.io/ghdl/pyGHDL/pyGHDL.dom.Concurrent.html Example showing the label and configuration components of a configuration instantiation. ```vhdl inst : configuration Counter; --^^^^ <- Label -- ^^^^^^^ <- Configuration ``` -------------------------------- ### PackageReferenceSymbol Example Source: https://ghdl.github.io/ghdl/pyGHDL/pyGHDL.dom.Symbol.html Example showing a package reference in VHDL code. ```vhdl use ieee.numeric_std; -- ^^^^^^^^^^^^^^^^ ``` -------------------------------- ### Bash: Configure vendor installation directories in config.sh Source: https://ghdl.github.io/ghdl/_sources/getting.rst.txt Set the installation directories for each vendor tool in the config.sh file. Use an empty string "" for tools not installed. ```Bash declare -A InstallationDirectory InstallationDirectory[AlteraQuartus]="/opt/Altera/16.0" InstallationDirectory[IntelQuartus]="/opt/intelFPGA/20.1" InstallationDirectory[LatticeDiamond]="/opt/Diamond/3.10_x64" InstallationDirectory[OSVVM]="/home//git/GitHub/OSVVM" InstallationDirectory[UVVM]="/home//git/GitHub/UVVM" InstallationDirectory[XilinxISE]="/opt/Xilinx/14.7" InstallationDirectory[XilinxVivado]="/opt/Xilinx/Vivado/2020.2" ``` -------------------------------- ### AllInstantiationList VHDL Example Source: https://ghdl.github.io/ghdl/pyGHDL/pyGHDL.dom.Configuration.html Example of an instantiation list naming all instances of a component in VHDL. ```vhdl for all : comp use entity work.sub(behav); -- ^^^ <- the instantiation list ``` -------------------------------- ### ModeViewSymbol Example Source: https://ghdl.github.io/ghdl/pyGHDL/pyGHDL.dom.Symbol.html Example showing a mode view reference in a VHDL port declaration. ```vhdl port (p : view MyView); -- ^^^^^^ ``` -------------------------------- ### RecordElementSymbol VHDL Example Source: https://ghdl.github.io/ghdl/_modules/pyVHDLModel/Symbol.html Example showing a reference to a record element. ```VHDL r := (a => '1', b => '0'); -- ^ <- Name ``` -------------------------------- ### OthersInstantiationList example Source: https://ghdl.github.io/ghdl/pyGHDL/pyGHDL.dom.Configuration.html Example showing the VHDL syntax for an instantiation list that targets components not configured elsewhere. ```vhdl for others : comp use entity work.sub(behav); -- ^^^^^^ <- the instantiation list ``` -------------------------------- ### EntityAspectConfiguration VHDL Example Source: https://ghdl.github.io/ghdl/pyGHDL/pyGHDL.dom.Configuration.html Example of a VHDL configuration aspect usage. ```vhdl use configuration work.cfg; -- ^^^^^^^^ <- Configuration ``` -------------------------------- ### Install GHDL Source: https://ghdl.github.io/ghdl/_sources/development/building/index.rst.txt Install the compiled GHDL executable to the location specified during the configuration step. ```bash $ make install ``` -------------------------------- ### PowerShell: Configure vendor installation directories in config.psm1 Source: https://ghdl.github.io/ghdl/_sources/getting.rst.txt Set the installation directories for each vendor tool in the config.psm1 file. Use an empty string "" for tools not installed. ```PowerShell $InstallationDirectory = @{ "AlteraQuartus" = "C:\Altera\16.0"; "IntelQuartus" = "C:\Altera\20.1"; "LatticeDiamond" = "C:\Lattice\Diamond\3.10_x64"; "XilinxISE" = "C:\Xilinx\14.7\ISE_DS"; "XilinxVivado" = "C:\Xilinx\Vivado\2020.2"; "OSVVM" = "C:\git\GitHub\OSVVM"; "UVVM" = "C:\git\GitHub\UVVM" } ``` -------------------------------- ### Install pyGHDL from git with matching commit hash Source: https://ghdl.github.io/ghdl/_sources/quick_start/python/index.rst.txt Install pyGHDL from the git repository using the commit hash of the installed GHDL binary. The version of the sources must be compatible with the installed GHDL and its shared library libghdl. Installing from master is discouraged because it may contain changes to the internal AST. ```shell pip install git+https://github.com/ghdl/ghdl.git@$(ghdl version hash) ``` -------------------------------- ### PackageSymbol VHDL Example Source: https://ghdl.github.io/ghdl/_modules/pyVHDLModel/Symbol.html Example showing a package reference within a package body declaration. ```VHDL package body Utilities is -- ^^^^^^^^^ end package body; ``` -------------------------------- ### File declaration example Source: https://ghdl.github.io/ghdl/pyGHDL/pyGHDL.dom.Object.html Example of a VHDL file declaration represented by the pyGHDL.dom.Object.File class. ```vhdl file INPUT : TEXT; ``` -------------------------------- ### Procedure Instantiation Example Source: https://ghdl.github.io/ghdl/pyGHDL/pyGHDL.dom.Subprogram.html An example of a VHDL procedure instantiation that can be represented by the ProcedureInstantiation class. ```vhdl procedure my_proc is new work.pkg.generic_proc generic map (T => integer); ``` -------------------------------- ### VHDL AllName Example Source: https://ghdl.github.io/ghdl/_modules/pyGHDL/dom/Name.html Example of the 'all' keyword following dot-notation as represented by AllName. ```VHDL ptr.all -- ^^^^ ``` -------------------------------- ### Procedure structure example Source: https://ghdl.github.io/ghdl/pyGHDL/pyGHDL.dom.Subprogram.html An example illustrating how VHDL procedure components map to the internal model structure. ```vhdl procedure proc(signal s : in bit; variable v : out bit) is -- ^^^^ <- Identifier -- ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ <- ParameterItems variable tmp : bit; --^^^^^^^^^^^^^^^^^^^ <- DeclaredItems begin tmp := s; --^^^^^^^^^ <- Statements v := tmp; end procedure; ``` -------------------------------- ### Configuration instantiation symbol example Source: https://ghdl.github.io/ghdl/_modules/pyGHDL/dom/Symbol.html Shows a configuration instantiation with the configuration name 'Counter' highlighted. Used in the docstring example for ConfigurationInstantiationSymbol. ```VHDL inst : configuration Counter; -- ^^^^^^^ ``` -------------------------------- ### SequentialSimpleSignalAssignment VHDL Example Source: https://ghdl.github.io/ghdl/_modules/pyVHDLModel/Sequential.html An example showing a labeled simple sequential signal assignment. ```VHDL lbl : s <= '1'; --^^^ <- optional Label -- ^ <- Target -- ^^^ <- Waveform ``` -------------------------------- ### IfStatement VHDL Examples Source: https://ghdl.github.io/ghdl/_modules/pyVHDLModel/Sequential.html Examples showing the structure of an IfStatement with and without additional branches. ```VHDL lbl : if sel = '0' then --^^^ <- optional Label s <= '0'; end if; ``` ```VHDL lbl : if sel = '0' then --^^^ <- optional Label -- ^^^^^^^^^^^^^^^^^ <- IfBranch s <= '0'; elsif sel = '1' then --^^^^^^^^^^^^^^^^^^^^ <- ElsIfBranches[0] s <= '1'; else --^^^^ <- ElseBranch s <= '0'; end if; ``` -------------------------------- ### Example usage of _PrintVersion Source: https://ghdl.github.io/ghdl/pyGHDL/pyGHDL.cli.dom.html Example showing how to call _PrintVersion from a derived class, passing a module with dunder variables and a package name. ```python def _PrintVersion(self): import myPackage.MyModule as DunderModule super()._PrintVersion( DunderModule, "MyModule" ) ``` -------------------------------- ### RangedChoice VHDL Example Source: https://ghdl.github.io/ghdl/_modules/pyVHDLModel/Sequential.html Example showing a ranged case choice where a range is used. ```VHDL when 1 to 2 => v := '0'; -- ^^^^^^ <- Range ``` -------------------------------- ### SimpleSubtypeSymbol VHDL Example Source: https://ghdl.github.io/ghdl/_modules/pyVHDLModel/Symbol.html Example showing a reference to a type or subtype by its type mark. ```VHDL signal s : bit := '0'; -- ^^^ <- Name ``` -------------------------------- ### SequentialProcedureCall VHDL Example Source: https://ghdl.github.io/ghdl/_modules/pyVHDLModel/Sequential.html An example showing a labeled procedure call as a sequential statement. ```VHDL lbl : log("hello"); --^^^ <- optional Label -- ^^^^^^^^^^^^ <- the call ``` -------------------------------- ### Install_Handler() Source: https://ghdl.github.io/ghdl/pyGHDL/pyGHDL.libghdl.errorout_console.html Installs the handlers for reporting errors on the console. ```APIDOC ## Install_Handler() ### Description Installs the handlers for reporting errors on the console. ### Method N/A ### Endpoint N/A ### Parameters None ### Request Example N/A ### Response #### Success Response - **Return type**: `None` #### Response Example N/A ``` -------------------------------- ### Get_Comment_Start Source: https://ghdl.github.io/ghdl/_modules/pyGHDL/libghdl/file_comments.html Gets the start position of a comment. Returns the position of the comment's first character. ```APIDOC ## Get_Comment_Start ### Description Gets the start position of a comment. Returns the position of the comment's first character. ### Function Get_Comment_Start(File: SourceFileEntry, Idx: Comment_Index) -> SourcePtr ### Parameters - **File** (SourceFileEntry) - Required - Source file for node - **Idx** (Comment_Index) - Required - Comment index ### Returns - **SourcePtr** - The position of the comment's first character. ``` -------------------------------- ### Install pyGHDL from git with pip using ghdl version hash Source: https://ghdl.github.io/ghdl/quick_start/python/index.html pyGHDL is not distributed through PyPI. Use `ghdl version hash` to get the commit hash of the installed binary and pass it to pip's git URL. Installing from `master` is discouraged because it may contain changes to the internal AST. ```bash pip install git+https://github.com/ghdl/ghdl.git@$(ghdl version hash) ``` -------------------------------- ### _initialize() Source: https://ghdl.github.io/ghdl/pyGHDL/pyGHDL.libghdl.html Locate and load the `libghdl` shared library. ```APIDOC ## pyGHDL.libghdl._initialize() ### Description Locate and load the `libghdl` shared library. ### Method Function ### Signature `_initialize()` ### Parameters None ### Returns The loaded shared library. ### Raises - **LibGHDLException** – If the shared library cannot be found. ``` -------------------------------- ### Type variable syntax examples Source: https://ghdl.github.io/ghdl/pyGHDL/pyGHDL.libghdl.file_comments.html Examples from the Python documentation illustrating the type parameter syntax for creating type variables, including bound, constrained, and default types. ```python class Sequence[T]: # T is a TypeVar ... ``` ```python # S is a TypeVar bound to str class StrSequence[S: str]: ... # A is a TypeVar constrained to str or bytes class StrOrBytesSequence[A: (str, bytes)]: ... ``` ```python T = TypeVar('T') # Can be anything S = TypeVar('S', bound=str) # Can be any subtype of str A = TypeVar('A', str, bytes) # Must be exactly str or bytes D = TypeVar('D', default=int) # Defaults to int ``` -------------------------------- ### __init__(_node_ , _name_ , _documentation =None_) Source: https://ghdl.github.io/ghdl/pyGHDL/pyGHDL.dom.InterfaceItem.html Initializes a package in a generic clause. ```APIDOC ## __init__(_node_ , _name_ , _documentation =None_) ### Description Initializes a package in a generic clause. ### Parameters - **node** (`TypeVar`(`Iir`, bound= `c_int`)) - Required - The IIR node this object was translated from. - **name** (`str`) - Required - The generic package’s identifier. - **documentation** (`str`) - Optional - The documentation comment associated with this declaration. ### Returns - **Return type**: None ``` -------------------------------- ### Application.__init__() Source: https://ghdl.github.io/ghdl/pyGHDL/pyGHDL.cli.dom.html Initializes the application. ```APIDOC ## Application.__init__() ### Description Initializes the application. ### Method __init__ ### Parameters None ### Returns None ``` -------------------------------- ### Application.HandleInfo(_args_) Source: https://ghdl.github.io/ghdl/pyGHDL/pyGHDL.cli.dom.html Handle the `version` sub-command: print copyright, license and authors. ```APIDOC ## Application.HandleInfo(_args_) ### Description Handle the `version` sub-command: print copyright, license and authors. ### Method HandleInfo ### Parameters - **args** – The parsed arguments, unused. ### Returns None ``` -------------------------------- ### Application.HandleHelp(_args_) Source: https://ghdl.github.io/ghdl/pyGHDL/pyGHDL.cli.dom.html Handle the `help` sub-command: print the help page of a command, or the overview. ```APIDOC ## Application.HandleHelp(_args_) ### Description Handle the `help` sub-command: print the help page of a command, or the overview. ### Method HandleHelp ### Parameters - **args** – The parsed arguments, carrying the optional command name. ### Returns None ``` -------------------------------- ### SequentialVariableAssignment VHDL Example Source: https://ghdl.github.io/ghdl/_modules/pyVHDLModel/Sequential.html Example showing the structure of a sequential variable assignment with an optional label, target, and expression. ```VHDL lbl : v := '1'; --^^^ <- optional Label -- ^ <- Target -- ^^^ <- Expression ``` -------------------------------- ### Application Initialization Source: https://ghdl.github.io/ghdl/_modules/pyGHDL/cli/dom.html Initializes the application, sets up the argument parser with a custom help formatter, and configures log message formats for different severity levels. ```python def __init__(self): """ Initializes the application. """ super().__init__() # Initialize DOM with an empty design # -------------------------------------------------------------------------- self._design = Design() # Call the constructor of the ArgParseMixin # -------------------------------------------------------------------------- textWidth = min(max(self.Width, 80), 160) description = dedent(""" Application to test pyGHDL's DOM API. """) epilog = "\n".join( wrap( dedent(""" pyGHDL is a Python binding for libghdl. """), textWidth, replace_whitespace=False, ) ) class HelpFormatter(RawDescriptionHelpFormatter): """ Help formatter widening argparse's output to the terminal. """ def __init__(self, *args, **kwargs): """ Initializes the formatter with a wider help column and line width. :param args: Positional arguments passed on to :class:`~argparse.RawDescriptionHelpFormatter`. :param kwargs: Keyword arguments passed on, with the width settings overridden. """ kwargs["max_help_position"] = 30 kwargs["width"] = textWidth super().__init__(*args, **kwargs) ArgParseHelperMixin.__init__( self, description=description, epilog=epilog, formatter_class=HelpFormatter, add_help=False, ) # Change error and warning reporting # -------------------------------------------------------------------------- self._LOG_MESSAGE_FORMAT__[Severity.Fatal] = "{DARK_RED}[FATAL] {message}{NOCOLOR}" self._LOG_MESSAGE_FORMAT__[Severity.Error] = "{RED}[ERROR] {message}{NOCOLOR}" self._LOG_MESSAGE_FORMAT__[Severity.Warning] = "{YELLOW}[WARNING] {message}{NOCOLOR}" self._LOG_MESSAGE_FORMAT__[Severity.Normal] = "{GRAY}{message}{NOCOLOR}" ``` -------------------------------- ### SlicedName VHDL Example Source: https://ghdl.github.io/ghdl/_modules/pyGHDL/dom/Name.html Example of a slice construct following a name. ```VHDL arr(7 downto 0) -- ^^^^^^^^^^^^ ``` -------------------------------- ### SimpleName VHDL Example Source: https://ghdl.github.io/ghdl/_modules/pyGHDL/dom/Name.html Example of a simple identifier name in VHDL. ```VHDL ieee ``` -------------------------------- ### Initialize VHDL Document (pyVHDLModel.Document.__init__) Source: https://ghdl.github.io/ghdl/_modules/pyVHDLModel.html Initializes a VHDL document with a path, optional documentation, VHDL version (default VHDL2008), library, and parent. Sets up internal dictionaries for design units, contexts, configurations, entities, architectures, packages, package bodies, and PSL verification units/properties/modes, plus dependency and compile-order graph vertices. ```python def __init__( self, path: Path, documentation: Nullable[str] = None, vhdlVersion: VHDLVersion = VHDLVersion.VHDL2008, library: Nullable[Library] = None, parent: Nullable[ModelEntity] = None ) -> None: """ Initializes a VHDL document. :param path: Path to the document. ``None`` if in-memory document. :param documentation: The documentation comment associated with this declaration. :param vhdlVersion: VHDL version used for analyzing this source file. :param library: VHDL library used for analyzing the source file's content into. :param parent: The parent model entity of this entity. """ super().__init__(parent) DocumentedEntityMixin.__init__(self, documentation) self._path = path self._vhdlVersion = vhdlVersion self._library = library self._designUnits = [] self._contexts = {} self._configurations = {} self._entities = {} self._architectures = {} self._packages = {} self._packageBodies = {} self._verificationUnits = {} self._verificationProperties = {} self._verificationModes = {} self._dependencyVertex = None self._compileOrderVertex = None ``` -------------------------------- ### Run the design Source: https://ghdl.github.io/ghdl-cosim/vhpidirect/grt.html Execution of the built binary and its expected output. ```bash $ ./test_grt Status is 0 Root instance name: counter ``` -------------------------------- ### ConfigurationSymbol VHDL Example Source: https://ghdl.github.io/ghdl/_modules/pyVHDLModel/Symbol.html Demonstrates a reference to a configuration in a component instantiation. ```VHDL for U1 : comp use configuration work.cfg; -- ^^^^^^^^ <- Name ``` -------------------------------- ### Compile vendor libraries in Bash (compile-altera.sh --all) Source: https://ghdl.github.io/ghdl/getting.html Steps for compiling vendor libraries in Bash: change to the simulation working directory, run one or more compile scripts with the --all flag, then list the created vendor directories. The scripts are installed in /usr/local/lib/ghdl/vendors and create directories named altera, intel, lattice, osvvm, uvvm, and xilinx-vivado in the current working directory. ```bash $ cd ``` ```bash $ /usr/local/lib/ghdl/vendors/compile-altera.sh --all $ /usr/local/lib/ghdl/vendors/compile-intel.sh --all $ /usr/local/lib/ghdl/vendors/compile-lattice.sh --all $ /usr/local/lib/ghdl/vendors/compile-uvvm.sh --all $ /usr/local/lib/ghdl/vendors/compile-xilinx-vivado.sh --all ``` ```bash $ ls -ahl ... drwxr-xr-x 2 56K Mar 09 17:41 altera drwxr-xr-x 2 56K Mar 09 17:42 intel drwxr-xr-x 2 56K Mar 09 17:42 lattice drwxr-xr-x 2 56K Mar 09 17:48 osvvm drwxr-xr-x 2 56K Mar 09 17:58 uvvm drwxr-xr-x 2 56K Mar 09 17:48 xilinx-vivado ``` -------------------------------- ### CompositeModeViewElement VHDL Example Source: https://ghdl.github.io/ghdl/_modules/pyGHDL/dom/InterfaceItem.html An example of a VHDL view declaration using CompositeModeViewElement. ```VHDL view OuterView of OuterRecord is b : view InnerView; end view; ``` -------------------------------- ### Install_Handler Source: https://ghdl.github.io/ghdl/_modules/pyGHDL/libghdl/errorout_memory.html Installs the error reporting handlers in memory. ```APIDOC ## Install_Handler ### Description Install the handlers for reporting errors. ### Method Install_Handler ### Parameters None ### Returns None ``` -------------------------------- ### VHDL AttributeName Example Source: https://ghdl.github.io/ghdl/_modules/pyGHDL/dom/Name.html Example of a name following tick-notation as represented by AttributeName. ```VHDL arr'length -- ^^^^^^^ ``` -------------------------------- ### VHDL SelectedName Example Source: https://ghdl.github.io/ghdl/_modules/pyGHDL/dom/Name.html Example of a name following dot-notation as represented by SelectedName. ```VHDL rec.elem -- ^^^^^ ``` -------------------------------- ### SimpleModeViewElement VHDL example Source: https://ghdl.github.io/ghdl/pyGHDL/pyGHDL.dom.InterfaceItem.html Shows the VHDL syntax for a mode view element declaration, as used by the SimpleModeViewElement class. The example declares a view named MyView of RecordType with identifiers a and b in out mode. ```vhdl view MyView of RecordType is a, b : out; end view; ``` -------------------------------- ### Application.HandlePretty(_args_) Source: https://ghdl.github.io/ghdl/pyGHDL/pyGHDL.cli.dom.html Handle the `pretty` sub-command: analyze the selected sources and pretty-print the resulting model. ```APIDOC ## Application.HandlePretty(_args_) ### Description Handle the `pretty` sub-command: analyze the selected sources and pretty-print the resulting model. A file is analyzed on its own; a directory is scanned, and each subdirectory is treated as a library of that name. The time _libghdl_ spent parsing and the time the translation took are reported per file. ### Method HandlePretty ### Parameters - **args** – The parsed arguments, carrying the selected files, directory and default library. ### Returns None ``` -------------------------------- ### UseClause example Source: https://ghdl.github.io/ghdl/pyGHDL/pyGHDL.dom.DesignUnit.html Represents a VHDL use clause. ```vhdl use std.text_io.all, ieee.numeric_std.all; ``` -------------------------------- ### __init__(_node_, _prefix_) Source: https://ghdl.github.io/ghdl/pyGHDL/pyGHDL.dom.Name.html Initializes an all name. ```APIDOC ## __init__(_node_, _prefix_) ### Description Initializes an all name. ### Parameters - **node** (`TypeVar`(`Iir`, bound= `c_int`)) - Required - The IIR node this object was translated from. - **prefix** (`Name`) - Required - Reference to the name's prefix, or `None` for a simple name. ### Returns - **None** ``` -------------------------------- ### Configuration.__init__ Source: https://ghdl.github.io/ghdl/pyGHDL/pyGHDL.dom.DesignUnit.html Initializes a configuration declaration with the given IIR node, identifier, entity, block configuration, context items, and documentation. ```APIDOC ## Configuration.__init__ ### Description Initializes a configuration declaration. ### Method Constructor ### Parameters - **node** (Iir) - Required - The IIR node this object was translated from. - **identifier** (str) - Required - The configuration's identifier. - **entity** (EntitySymbol) - Required - Reference to the entity this configuration configures. - **blockConfiguration** (BlockConfiguration) - Required - The configuration of the entity's architecture. - **contextItems** (Iterable[Context]) - Optional - List of all context items (library, use and context clauses). - **documentation** (str) - Optional - The documentation comment associated with this declaration. ### Return Type None ``` -------------------------------- ### Function Instantiation Example Source: https://ghdl.github.io/ghdl/pyGHDL/pyGHDL.dom.Subprogram.html An example of a VHDL function instantiation that can be represented by the FunctionInstantiation class. ```vhdl function add_int is new work.pkg.generic_add generic map (T => integer); ``` -------------------------------- ### PackageInstantiation.__init__ Source: https://ghdl.github.io/ghdl/pyGHDL/pyGHDL.dom.DesignUnit.html Initializes a package instantiation with the given IIR node, identifier, uninstantiated package name, context items, generic association items, and documentation. ```APIDOC ## PackageInstantiation.__init__ ### Description Initializes a package instantiation. ### Method Constructor ### Parameters - **node** (Iir) - Required - The IIR node this object was translated from. - **identifier** (str) - Required - The instantiated package's identifier. - **uninstantiatedPackageName** (Symbol) - Required - The name of the uninstantiated generic package. - **contextItems** (Iterable[LibraryClause | UseClause | ContextReference]) - Optional - List of all context items (library, use and context clauses). - **genericAssociationItems** (Iterable[GenericAssociationItem]) - Optional - List of all generic associations in the generic map aspect. - **documentation** (str) - Optional - The documentation comment associated with this declaration. ### Return Type None ``` -------------------------------- ### VHDL Package Instantiation Syntax Source: https://ghdl.github.io/ghdl/pyGHDL/pyGHDL.dom.DesignUnit.html An example of the VHDL syntax for instantiating a generic package, highlighting the identifier and package reference. ```vhdl package p is new gp generic map (N => 1); -- ^ <- Identifier -- ^^ <- PackageReference ``` -------------------------------- ### EntityAspectOpen usage example Source: https://ghdl.github.io/ghdl/pyGHDL/pyGHDL.dom.Configuration.html Example showing the use of an open entity aspect in VHDL. ```vhdl use open; -- ^^^^ <- the aspect ``` -------------------------------- ### Case alternative example Source: https://ghdl.github.io/ghdl/_modules/pyVHDLModel/Sequential.html Shows the structure of a single case alternative with choices and statements. ```VHDL when 1 to 2 => v := '0'; -- ^^^^^^ <- Choices -- ^^^^^^^^^ <- the statements ``` -------------------------------- ### LibraryClause example Source: https://ghdl.github.io/ghdl/pyGHDL/pyGHDL.dom.DesignUnit.html Represents a VHDL library clause. ```vhdl library std, ieee; ``` -------------------------------- ### OthersAggregateElement usage example Source: https://ghdl.github.io/ghdl/pyGHDL/pyGHDL.dom.Aggregates.html Example showing the representation of an 'others' element in a VHDL aggregate. ```vhdl res := (0 => '1', others => '0'); -- ^^^^^^ <- the choice -- ^^^ <- Expression ``` -------------------------------- ### Build GHDL with GCC backend Source: https://ghdl.github.io/ghdl/development/building/GCC.html Build GHDL with the GCC backend. Configure GHDL with --with-gcc pointing to the GCC source directory and the same --prefix as later used for GCC. Then copy sources, configure GCC with --enable-languages=c,vhdl, build and install GCC, and finally build and install GHDL libraries. ```shell $ cd $ mkdir build $ cd build $ ../configure --with-gcc=/path/to/gcc/source/dir --prefix=/usr/local $ make copy-sources $ mkdir gcc-objs; cd gcc-objs $ /path/to/gcc/source/dir/configure --prefix=/usr/local --enable-languages=c,vhdl \ --disable-bootstrap --disable-lto --disable-multilib --disable-libssp \ --disable-libgomp --disable-libquadmath $ make -j2 && make install $ cd /path/to/ghdl/source/dir/build $ make ghdllib $ make install ``` -------------------------------- ### Package.__init__ Source: https://ghdl.github.io/ghdl/pyGHDL/pyGHDL.dom.DesignUnit.html Initializes a Package object with the given IIR node, identifier, context items, generic items, declared items, and documentation. ```APIDOC ## Package.__init__ ### Description Initializes a Package object with the given IIR node, identifier, context items, generic items, declared items, and documentation. ### Method Constructor ### Parameters - **node** (Iir) - Required - The IIR node this object was translated from. - **identifier** (str) - Required - Name of the VHDL package. - **contextItems** (Iterable[LibraryClause | UseClause | ContextReference]) - Optional - List of all context items (library, use and context clauses). - **genericItems** (Iterable[GenericInterfaceItemMixin]) - Optional - List of all generics, in declaration order. - **declaredItems** (Iterable) - Optional - List of all declared items in this concurrent declaration region. - **documentation** (str) - Optional - The documentation comment associated with this declaration. ### Return Type None ``` -------------------------------- ### Initialize libghdl with options__initialize Source: https://ghdl.github.io/ghdl/_modules/pyGHDL/libghdl.html Initializes or re-initializes the shared library. Calls the libghdl.options__initialize function. ```python def initialize() -> None: """Initialize or re-initialize the shared library.""" libghdl.options__initialize() ``` -------------------------------- ### __init__(_node_) Source: https://ghdl.github.io/ghdl/pyGHDL/pyGHDL.dom.Name.html Initializes an open name. ```APIDOC ## __init__(_node_) ### Description Initializes an open name. ### Parameters - **node** (`TypeVar`(`Iir`, bound= `c_int`)) - The IIR node this object was translated from. ### Returns - None ``` -------------------------------- ### Build GHDL with LLVM backend using configure and make Source: https://ghdl.github.io/ghdl/_sources/development/building/LLVM.rst.txt Configure and build GHDL with the LLVM backend. Requires GCC, GNAT, and LLVM/CLANG. Specify --with-llvm-config to select the backend; if llvm-config is not in PATH, use --with-llvm-config=LLVM_INSTALL/bin/llvm-config. Optionally add --with-backtrace-lib=/path-to-gcc-build/libbacktrace/.libs/libbacktrace.a for stack backtraces. ```Bash $ cd $ mkdir build $ cd build $ ../configure --with-llvm-config --prefix=PREFIX $ make $ make install ``` -------------------------------- ### ModeViewDeclaration VHDL Example Source: https://ghdl.github.io/ghdl/_modules/pyGHDL/dom/InterfaceItem.html An example of a VHDL mode view declaration for a record type. ```VHDL view MyView of RecordType is a : out; b : in; end view; ``` -------------------------------- ### Build GHDL with GCC backend: configure and build commands Source: https://ghdl.github.io/ghdl/_sources/development/building/GCC.rst.txt Commands to configure GHDL and GCC, build GCC, then build and install GHDL libraries. Requires matching GCC source dir and prefix; adjust --disable options as needed. ```Bash $ cd $ mkdir build $ cd build $ ../configure --with-gcc=/path/to/gcc/source/dir --prefix=/usr/local $ make copy-sources $ mkdir gcc-objs; cd gcc-objs $ /path/to/gcc/source/dir/configure --prefix=/usr/local --enable-languages=c,vhdl \ --disable-bootstrap --disable-lto --disable-multilib --disable-libssp \ --disable-libgomp --disable-libquadmath $ make -j2 && make install $ cd /path/to/ghdl/source/dir/build $ make ghdllib $ make install ``` ```Bash $ make ghdl1-gcc # Build the compiler $ make ghdl_gcc # Build the driver $ make libs.vhdl.local_gcc -- Compile the vhdl libraries $ make grt-all -- Build the GHDL runtime $ make install.vpi.local -- Locally install vpi files ``` ```Bash AGCC_GCCSRC_DIR=/path/to/gcc/sources AGCC_GCCOBJ_DIR=/path/to/gcc/build ``` ```diff || ! strcmp (language_string, "GNU GIMPLE") || ! strcmp (language_string, "GNU Go") || ! strcmp (language_string, "GNU D") - || ! strcmp (language_string, "libgccjit")) + || ! strcmp (language_string, "libgccjit") + || ! strcmp (language_string, "vhdl") i = 0; ``` -------------------------------- ### NamedAggregateElement usage example Source: https://ghdl.github.io/ghdl/pyGHDL/pyGHDL.dom.Aggregates.html Example showing how a named aggregate element maps to VHDL syntax. ```vhdl r := (a => '1', b => '0'); -- ^ <- Name -- ^^^ <- Expression ``` -------------------------------- ### Synthesis Pragma Examples Source: https://ghdl.github.io/ghdl/_sources/using/Synthesis.rst.txt Examples of pragmas used to prevent specific blocks of code from being synthesized. ```vhdl -- pragma translate off -- synthesis translate_on -- synopsys synthesis_off ``` -------------------------------- ### IndexedChoice VHDL Example Source: https://ghdl.github.io/ghdl/_modules/pyVHDLModel/Sequential.html Example showing an indexed case choice where a single value is used. ```VHDL when 0 => v := '1'; -- ^ <- Expression ``` -------------------------------- ### VHDL Sequential Assert Statement Example Source: https://ghdl.github.io/ghdl/_modules/pyVHDLModel/Sequential.html Example syntax for a sequential assertion statement in VHDL. ```VHDL lbl : assert sel = '0' report "bad" severity error; --^^^ <- optional Label -- ^^^^^^^^^ <- Condition -- ^^^^^ <- optional Message -- ^^^^^ <- optional Severity ``` -------------------------------- ### VHDL Hello world program (hello.vhdl) Source: https://ghdl.github.io/ghdl/quick_start/simulation/hello/index.html A commented VHDL entity with no ports that writes 'Hello world!' to the standard output. Save it as hello.vhdl. The program uses the standard textio package and a process with a wait statement to end the simulation. ```vhdl -- Hello world program use std.textio.all; -- Imports the standard textio package. -- Defines a design entity, without any ports. entity hello_world is end hello_world; architecture behaviour of hello_world is begin process variable l : line; begin write (l, String'("Hello world!")); writeline (output, l); wait; end process; end behaviour; ``` -------------------------------- ### VHDL Sequential Report Statement Example Source: https://ghdl.github.io/ghdl/_modules/pyVHDLModel/Sequential.html Example syntax for a sequential report statement in VHDL. ```VHDL lbl : report "message" severity note; --^^^ <- optional Label -- ^^^^^^^^^ <- Message -- ^^^^ <- optional Severity ``` -------------------------------- ### VHDL Signal Release Assignment Example Source: https://ghdl.github.io/ghdl/_modules/pyVHDLModel/Sequential.html Example syntax for a signal release assignment in VHDL. ```VHDL lbl : s <= release; --^^^ <- optional Label -- ^ <- Target ``` -------------------------------- ### Configure and build GHDL with mcode backend Source: https://ghdl.github.io/ghdl/_sources/development/building/index.rst.txt Run these commands in the GHDL base directory to configure the build with a specific prefix and compile the project. ```bash $ ./configure --prefix=/usr/local $ make ``` -------------------------------- ### VHDL Signal Force Assignment Example Source: https://ghdl.github.io/ghdl/_modules/pyVHDLModel/Sequential.html Example syntax for a signal force assignment in VHDL. ```VHDL lbl : s <= force '1'; --^^^ <- optional Label -- ^ <- Target -- ^^^ <- Expression ``` -------------------------------- ### VPI vlog_startup_routines array Source: https://ghdl.github.io/ghdl/_sources/using/Simulation.rst.txt Defines the vlog_startup_routines array that GHDL calls when loading a VPI library with --vpi. The array must be terminated with a null pointer. ```c void (*vlog_startup_routines[]) () = { my_handle_register, 0 }; ``` -------------------------------- ### Case statement example Source: https://ghdl.github.io/ghdl/_modules/pyVHDLModel/Sequential.html Demonstrates a full case statement structure including an optional label, select expression, and multiple cases. ```VHDL lbl : case sel is --^^^ <- optional Label -- ^^^ <- SelectExpression when '0' => s <= '1'; -- ^^^^^^^^^^^^^^^^^^^^^^^^ <- Cases[0] when others => null; -- ^^^^^^^^^^^^^^^^^^^^ <- Cases[1] end case; ``` -------------------------------- ### VHDL OpenName Example Source: https://ghdl.github.io/ghdl/_modules/pyGHDL/dom/Name.html Example of the 'open' keyword used as a special name as represented by OpenName. ```VHDL open ``` -------------------------------- ### Build GRT library and prepare .ali files Source: https://ghdl.github.io/ghdl-cosim/_sources/vhpidirect/grt.rst.txt Builds the GRT library without the No_Run_Time pragma by resetting GRT_PRAGMA_FLAG, then removes object files and makes .ali files read-only so gnatlink does not fetch individual objects. Required before using AVHPI from Ada. ```shell $ make GRT_PRAGMA_FLAG= grt-all ``` ```shell $ rm *.o $ chmod -w *.ali ``` -------------------------------- ### Python example to load and run a GHDL simulation Source: https://ghdl.github.io/ghdl-cosim/vhpidirect/dynamic.html Shows how to load a GHDL simulation shared library using ctypes, pass arguments, call the main function, and unload the library. Includes commented lines for Windows. ```python import ctypes gbin = ctypes.CDLL(bin_path) args = ['-gGENA="value"', 'gGENB="value"'] xargs = (ctypes.POINTER(ctypes.c_char) * (len(args)+1))() for idx, arg in enumerate(args): xargs[idx+1] = ctypes.create_string_buffer(arg.encode('utf-8')) gbin.main(len(xargs)-1, xargs) import _ctypes # On GNU/Linux _ctypes.dlclose(gbin._handle) # On Windows #_ctypes.FreeLibrary(gbin._handle) ``` -------------------------------- ### ParenthesisName VHDL Example Source: https://ghdl.github.io/ghdl/_modules/pyGHDL/dom/Name.html Example of a parenthesis construct used for index access or function calls. ```VHDL arr(0) -- ^^^ ``` -------------------------------- ### ConstrainedArraySubtypeSymbol Example Source: https://ghdl.github.io/ghdl/pyGHDL/pyGHDL.dom.Symbol.html An example showing how a VHDL signal declaration maps to the ConstrainedArraySubtypeSymbol, identifying the name and constraints. ```vhdl signal v : bit_vector(7 downto 0); -- ^^^^^^^^^^ <- Name -- ^^^^^^^^^^ <- Constraints ``` -------------------------------- ### disp_config() -> None Source: https://ghdl.github.io/ghdl/_modules/pyGHDL/libghdl.html Displays the configured prefixes for libghdl. ```APIDOC ## disp_config() -> None ### Description Display the configured prefixes for libghdl. ### Returns None ### Example ```python disp_config() ``` ``` -------------------------------- ### VHDL Entity Declaration Example Source: https://ghdl.github.io/ghdl/pyGHDL/pyGHDL.dom.DesignUnit.html A basic example of a VHDL entity declaration as represented by the Entity class. ```vhdl entity ent is -- ... end entity; ``` -------------------------------- ### VHDL variable declaration example Source: https://ghdl.github.io/ghdl/pyGHDL/pyGHDL.dom.Object.html Example of a VHDL variable declaration as shown in the documentation for the Variable class. ```vhdl variable result : natural := 0; ``` -------------------------------- ### Display help with ghdl --help, -h, and -h command Source: https://ghdl.github.io/ghdl/using/CommandReference.html Display a short description of all available commands. If the help switch is followed by a command switch, options for that second command are displayed. ```shell ghdl --help ghdl -h ghdl -h command ``` -------------------------------- ### EntityAspectEntity usage example Source: https://ghdl.github.io/ghdl/pyGHDL/pyGHDL.dom.Configuration.html An example showing how an entity aspect names an entity and an optional architecture in VHDL. ```vhdl use entity work.e_rest(rtl); -- ^^^^^^^^^^^ <- Entity -- ^^^ <- Architecture ``` -------------------------------- ### Build the Ada and VHDL project Source: https://ghdl.github.io/ghdl-cosim/vhpidirect/grt.html Command to build the test_grt executable using gnatmake and linking against the GHDL design. ```bash $ gnatmake test_grt -aL`grt_ali_path` -aI`grt_src_path` -largs `ghdl --list-link counter` ``` -------------------------------- ### VHDL Return Statement Example Source: https://ghdl.github.io/ghdl/_modules/pyVHDLModel/Sequential.html Shows the syntax for a return statement, which supports an optional label and an optional return value. ```VHDL lbl : return x; --^^^ <- optional Label -- ^ <- optional ReturnValue ``` -------------------------------- ### VHDL Port View Declaration Example Source: https://ghdl.github.io/ghdl/_modules/pyGHDL/dom/InterfaceItem.html Example of a VHDL port declaration using a mode view. ```VHDL port (p : view MyView); ``` -------------------------------- ### Get_Design_Unit Source: https://ghdl.github.io/ghdl/_sources/pyGHDL/pyGHDL.libghdl.vhdl.nodes.rst.txt Gets the design unit in which the target is declared. For a library unit, this is to get the design unit node. ```APIDOC ## Get_Design_Unit ### Description Gets the design unit in which the target is declared. For a library unit, this is to get the design unit node. ``` -------------------------------- ### Main application entry point Source: https://ghdl.github.io/ghdl/_modules/pyGHDL/cli/dom.html The main function handles argument parsing, application initialization, and comprehensive exception handling for the CLI. ```python def main(): # mccabe:disable=MC0001 """This is the entry point for pyghdl.cli.dom written as a function. 1. It extracts common flags from the script's arguments list, before :class:`~argparse.ArgumentParser` is fully loaded. 2. It creates an instance of DOM test application and hands over to a class based execution. All is wrapped in a big ``try..except`` block to catch every unhandled exception. 3. Shutdown the script and return its exit code. """ from sys import argv as sys_argv # debug = "-d" in sys_argv # verbose = "-v" in sys_argv # quiet = "-q" in sys_argv try: # handover to a class instance app = Application() # debug, verbose, quiet) except Exception: return try: app.CheckPythonVersion((3, 8, 0)) app.Run() app.Exit() except PrettyPrintException as ex: print(f"PP: {ex!s}") app.Exit() except DOMException as ex: print(f"DOM: {ex!s}") ex2: LibGHDLException = ex.__cause__ if ex2 is not None: for message in ex2.InternalErrors: print(f"libghdl: {message}") TerminalApplication.Exit(0) app.Exit(6) except LibGHDLException as ex: print(f"LIB: {ex!s}") for message in ex.InternalErrors: print(f" {message}") app.Exit(5) except GHDLBaseException as ex: app.PrintExceptionBase(ex) except NotImplementedError as ex: app.PrintNotImplementedError(ex) # except ImportError as ex: # printImportError(ex) except Exception as ex: app.PrintException(ex) # entry point if __name__ == "__main__": main() ``` -------------------------------- ### DeferredConstant example: constant BITS : positive; Source: https://ghdl.github.io/ghdl/pyGHDL/pyGHDL.dom.Object.html Shows a VHDL deferred constant declaration as an example for the DeferredConstant class. ```vhdl constant BITS : positive; ``` -------------------------------- ### AllPackageMembersReferenceSymbol example: use all Source: https://ghdl.github.io/ghdl/_modules/pyGHDL/dom/Symbol.html Shows a use clause with a comment marker indicating the all package members reference symbol. Used in the AllPackageMembersReferenceSymbol class documentation. ```VHDL use ieee.numeric_std.all; -- ^^^^^^^^^^^^^^^^^^^^ ``` -------------------------------- ### Compile vendor libraries in PowerShell (compile-altera.ps1 -All) Source: https://ghdl.github.io/ghdl/getting.html Steps for compiling vendor libraries in PowerShell: change to the simulation working directory, run one or more compile scripts with the -All flag, then list the created vendor directories. The scripts are installed in \lib\ghdl\vendors and create directories named altera, intel, lattice, osvvm, uvvm, and xilinx-vivado in the current working directory. ```powershell PS> cd ``` ```powershell PS> \lib\ghdl\vendors\compile-altera.ps1 -All PS> \lib\ghdl\vendors\compile-intel.ps1 -All PS> \lib\ghdl\vendors\compile-lattice.ps1 -All PS> \lib\ghdl\vendors\compile-uvvm.ps1 -All PS> \lib\ghdl\vendors\compile-xilinx-vivado.ps1 -All ``` ```powershell PS> dir Directory: D:\temp\ghdl Mode LastWriteTime Length Name ---- ------------- ------ ---- d---- 09.03.2018 19:33 altera d---- 09.03.2018 19:38 intel d---- 09.03.2018 19:38 lattice d---- 09.03.2018 19:38 osvvm d---- 09.03.2018 19:45 uvvm d---- 09.03.2018 19:40 xilinx-vivado ``` -------------------------------- ### Synthesis Generic Override Example Source: https://ghdl.github.io/ghdl/_sources/using/Synthesis.rst.txt Example of using the -g option to override a top unit generic during synthesis. ```bash $ ghdl --synth --std=08 -gDEPTH=12 [library.]top_unit [arch] ``` -------------------------------- ### VHDL configuration declaration example Source: https://ghdl.github.io/ghdl/_modules/pyVHDLModel/DesignUnit.html Shows the VHDL syntax for a configuration declaration, as referenced in the docstring of the Configuration class. Use this as a template when creating a configuration that binds an entity to an architecture block configuration. ```VHDL configuration cfg of ent is for rtl -- ... end for; end configuration; ``` -------------------------------- ### Context.__init__ Source: https://ghdl.github.io/ghdl/pyGHDL/pyGHDL.dom.DesignUnit.html Initializes a context declaration with the given IIR node, identifier, references, and documentation. ```APIDOC ## Context.__init__ ### Description Initializes a context declaration. ### Method Constructor ### Parameters - **node** (Iir) - Required - The IIR node this object was translated from. - **identifier** (str) - Required - The context's identifier. - **references** (Iterable[LibraryClause | UseClause | ContextReference]) - Optional - All context items, in declaration order. - **documentation** (str) - Optional - The documentation comment associated with this declaration. ### Return Type None ``` -------------------------------- ### VHDL Range Attribute Constraint Example Source: https://ghdl.github.io/ghdl/_modules/pyVHDLModel/Symbol.html Example showing a range constraint defined via a range attribute. ```VHDL subtype index is natural range vector'range; -- ^^^^^^^ <- Name -- ^^^^^^^^^^^^ <- Constraint ``` -------------------------------- ### VHDL Scalar Range Constraint Example Source: https://ghdl.github.io/ghdl/_modules/pyVHDLModel/Symbol.html Example showing a scalar range constraint applied to an integer loop. ```VHDL for i in integer range 0 to 3 loop -- ^^^^^^^ <- Name -- ^^^^^^ <- Constraint ``` -------------------------------- ### Application.HandleDefault(___ ) Source: https://ghdl.github.io/ghdl/pyGHDL/pyGHDL.cli.dom.html Handle an invocation with no sub-command by printing the help page. ```APIDOC ## Application.HandleDefault(___ ) ### Description Handle an invocation with no sub-command by printing the help page. ### Method HandleDefault ### Parameters - **_** – The parsed arguments, unused. ### Returns None ``` -------------------------------- ### SequentialConditionalSignalAssignment VHDL Example Source: https://ghdl.github.io/ghdl/_modules/pyVHDLModel/Sequential.html Example showing the structure of a conditional sequential signal assignment with an optional label, target, and conditional waveforms. ```VHDL lbl : s <= '1' when sel = '0' else '0'; --^^^ <- optional Label -- ^ <- Target -- ^^^^^^^^^^^^^^^^^^ <- ConditionalWaveforms[0] -- ^^^ <- ConditionalWaveforms[1] ``` -------------------------------- ### Application.Run() Source: https://ghdl.github.io/ghdl/pyGHDL/pyGHDL.cli.dom.html Parse the command line and run the requested sub-command. ```APIDOC ## Application.Run() ### Description Parse the command line and run the requested sub-command. ### Method Run ### Parameters None ### Returns None ``` -------------------------------- ### analyze_init() -> None Source: https://ghdl.github.io/ghdl/_modules/pyGHDL/libghdl.html Initializes the analyzer. Deprecated as it may raise an exception; use analyze_init_status instead. ```APIDOC ## analyze_init() -> None ### Description Initialize the analyzer. Deprecated since version 1.0.0. ### Returns None ### Example ```python analyze_init() ``` ``` -------------------------------- ### SequentialConditionalVariableAssignment VHDL Example Source: https://ghdl.github.io/ghdl/_modules/pyVHDLModel/Sequential.html Example showing the structure of a conditional sequential variable assignment with an optional label, target, and conditional expressions. ```VHDL lbl : v := '1' when sel = '0' else '0'; --^^^ <- optional Label -- ^ <- Target -- ^^^^^^^^^^^^^^^^^^ <- ConditionalExpressions[0] -- ^^^ <- ConditionalExpressions[1] ``` -------------------------------- ### VHDL array type declaration example Source: https://ghdl.github.io/ghdl/_modules/pyGHDL/dom/Type.html Shows the VHDL syntax for declaring an array type, as used in the documentation example for ArrayType. ```VHDL type bit_vector is array(natural range <>) of bit; ``` -------------------------------- ### Entity symbol in architecture declaration example Source: https://ghdl.github.io/ghdl/_modules/pyGHDL/dom/Symbol.html Shows an architecture declaration with the entity name 'Counter' highlighted. Used in the docstring example for EntitySymbol. ```VHDL architecture rtl of Counter is -- ^^^^^^^ begin end architecture; ``` -------------------------------- ### LibraryReferenceSymbol.__init__ Source: https://ghdl.github.io/ghdl/_modules/pyVHDLModel/Symbol.html Initializes a reference (name) to a library. ```APIDOC ## LibraryReferenceSymbol.__init__ ### Description Initializes a reference (name) to a library. ### Method Constructor ### Parameters - **name** (Name) - Required - The name to reference the language entity. ### Returns None ``` -------------------------------- ### VHDL protected type declaration example Source: https://ghdl.github.io/ghdl/_modules/pyGHDL/dom/Type.html Shows the VHDL syntax for a protected type declaration, used in the documentation example for the ProtectedType class. ```VHDL type pt is protected -- public interface end protected; ``` -------------------------------- ### Build GHDL with mcode backend using configure and make Source: https://ghdl.github.io/ghdl/_sources/development/building/mcode.rst.txt Configure and build GHDL with the mcode backend on GNU/Linux or Windows (MinGW/MSYS2). Requires GCC and GNAT. The configure step selects mcode by default unless another backend is specified; PREFIX sets the installation directory. On GNU/Linux, super user privileges may be needed for make install. ```Bash $ cd $ mkdir build $ cd build $ ../configure --prefix=PREFIX $ make $ make install ``` -------------------------------- ### VHDL record type declaration example Source: https://ghdl.github.io/ghdl/_modules/pyGHDL/dom/Type.html Shows the VHDL syntax for a record type declaration, used in the documentation example for the RecordType class. ```VHDL type pt is record -- elements end record; ```