### AsmJit: XAcquire/XRelease Prefixes

Source: https://asmjit.com/doc/classasmjit_1_1x86_1_1Assembler

Illustrates the usage of 'xacquire' and 'xrelease' prefixes in AsmJit, which are used in specific synchronization scenarios. The example shows applying 'xacquire' to an `add` operation.

```cpp
#include <asmjit/x86.h>
using namespace asmjit;
void prefixes_example(x86::Assembler& a) {
// Similarly, XAcquire/XRelease prefixes are also available:
// xacquire add dword ptr [rdi], 1
a.xacquire().add(x86::dword_ptr(x86::rdi), 1);
}
```

--------------------------------

### SIMD/SSE General Instructions

Source: https://asmjit.com/doc/classasmjit_1_1x86_1_1Compiler

This section covers general SIMD instructions.

```APIDOC
## SIMD/SSE General Instructions

### Description
Details general-purpose SIMD instructions.

### General SIMD Instructions
- **emms**(): Performs the EMMS instruction.
- **femms**(): Performs the FEMMS instruction.
```

--------------------------------

### SIMD/SSE SHA Instructions

Source: https://asmjit.com/doc/classasmjit_1_1x86_1_1Compiler

Documentation for SSE instructions related to SHA hashing.

```APIDOC
## SIMD/SSE SHA Instructions

### Description
Details SIMD instructions for SHA-1 and SHA-256 hashing.

### SHA Instructions
- **sha1msg1**(const Vec& o0, const Vec& o1): Processes the first message schedule for SHA-1.
- **sha1msg2**(const Vec& o0, const Vec& o1): Processes the second message schedule for SHA-1.
- **sha1nexte**(const Vec& o0, const Vec& o1): Computes the next SHA-1 intermediate hash state.
- **sha1rnds4**(const Vec& o0, const Vec& o1, const Imm& o2): Performs four rounds of SHA-1 computation.
- **sha256msg1**(const Vec& o0, const Vec& o1): Processes the first message schedule for SHA-256.
- **sha256msg2**(const Vec& o0, const Vec& o1): Processes the second message schedule for SHA-256.
- **sha256rnds2**(const Vec& o0, const Vec& o1, const XMM0& o2): Performs two rounds of SHA-256 computation.
```

--------------------------------

### AsmJit: Rep Prefix with RET Instruction

Source: https://asmjit.com/doc/classasmjit_1_1x86_1_1Assembler

Shows an example of using the 'rep' prefix with the 'ret' instruction in AsmJit. While not a typical use case, it demonstrates AsmJit's flexibility with prefixes.

```cpp
#include <asmjit/x86.h>
using namespace asmjit;
void prefixes_example(x86::Assembler& a) {
// Some instructions accept prefixes not originally intended to:
// rep ret
a.rep().ret();
}
```

--------------------------------

### AsmJit Stack Management Example

Source: https://asmjit.com/doc/classasmjit_1_1x86_1_1Compiler

Demonstrates allocating stack space, filling it with data, and summing the contents using AsmJit's x86 compiler. It shows how to manage memory on the stack for temporary storage within generated functions.

```cpp
#include <asmjit/x86.h>
#include <stdio.h>
using namespace asmjit;
int main() {
using Func = int (*)(void); // Signature of the generated function.
JitRuntime rt; // Runtime specialized for JIT code execution.
CodeHolder code; // Holds code and relocation information.
code.init(rt.environment(), // Initialize code to match the JIT environment.
rt.cpu_features());
x86::Compiler cc(&code); // Create and attach x86::Compiler to code.
cc.add_func(FuncSignature::build<int>()); // Create a function that returns int.
x86::Gp p = cc.new_gp_ptr("p");
x86::Gp i = cc.new_gp_ptr("i");
// Allocate 256 bytes on the stack aligned to 4 bytes.
x86::Mem stack = cc.new_stack(256, 4);
x86::Mem stack_idx(stack); // Copy of stack with i added.
stack_idx.set_index(i); // stack_idx <- stack[i].
stack_idx.set_size(1); // stack_idx <- byte ptr stack[i].
// Load a stack address to `p`. This step is purely optional and shows
// that `lea` is useful to load a memory operands address (even absolute)
// to a general purpose register.
cc.lea(p, stack);
// Clear i (xor is a C++ keyword, hence 'xor_' is used instead).
cc.xor_(i, i);
Label L1 = cc.new_label();
Label L2 = cc.new_label();
cc.bind(L1); // First loop, fill the stack.
cc.mov(stack_idx, i.r8()); // stack[i] = uint8_t(i).
cc.inc(i); // i++;
cc.cmp(i, 256); // if (i < 256)
cc.jb(L1); // goto L1;
// Second loop, sum all bytes stored in `stack`.
x86::Gp sum = cc.new_gp32("sum");
x86::Gp val = cc.new_gp32("val");
cc.xor_(i, i);
cc.xor_(sum, sum);
cc.bind(L2);
cc.movzx(val, stack_idx); // val = uint32_t(stack[i]);
cc.add(sum, val); // sum += val;
cc.inc(i); // i++;
cc.cmp(i, 256); // if (i < 256)
cc.jb(L2); // goto L2;
cc.ret(sum); // Return the `sum` of all values.
cc.end_func(); // End of the function body.
cc.finalize(); // Translate and assemble the whole 'cc' content.
// ----> x86::Compiler is no longer needed from here and can be destroyed <---- 
Func func;
Error err = rt.add(&func, &code); // Add the generated code to the runtime.
if (err != Error::kOk) {
return 1; // Handle a possible error returned by AsmJit.
}
// ----> CodeHolder is no longer needed from here and can be destroyed <---- 
printf("Func() -> %d\n", func()); // Test the generated code.
rt.release(func);
return 0;
}
```

--------------------------------

### SIMD/SSE Vector Instructions

Source: https://asmjit.com/doc/classasmjit_1_1x86_1_1Compiler

Documentation for general vector operations.

```APIDOC
## SIMD/SSE Vector Instructions

### Description
Covers various vector manipulation and arithmetic instructions.

### Vector Instructions
- **vaddpd**(const Vec& o0, const Vec& o1, const Vec& o2): Performs packed double-precision floating-point addition.
```

--------------------------------

### SIMD/SSE KNC Instructions

Source: https://asmjit.com/doc/classasmjit_1_1x86_1_1Compiler

Documentation for KNC (Intel Xeon Phi) instructions.

```APIDOC
## SIMD/SSE KNC Instructions

### Description
Provides documentation for KNC (Intel Xeon Phi) specific SIMD instructions.

### KNC Instructions
- **kaddb**(const KReg& o0, const KReg& o1, const KReg& o2): Adds two bytes in K registers.
- **kaddd**(const KReg& o0, const KReg& o1, const KReg& o2): Adds two dwords in K registers.
- **kaddq**(const KReg& o0, const KReg& o1, const KReg& o2): Adds two qwords in K registers.
- **kaddw**(const KReg& o0, const KReg& o1, const KReg& o2): Adds two words in K registers.
- **kandb**(const KReg& o0, const KReg& o1, const KReg& o2): Performs bitwise AND on two bytes in K registers.
- **kandd**(const KReg& o0, const KReg& o1, const KReg& o2): Performs bitwise AND on two dwords in K registers.
- **kandnb**(const KReg& o0, const KReg& o1, const KReg& o2): Performs bitwise AND NOT on two bytes in K registers.
- **kandnd**(const KReg& o0, const KReg& o1, const KReg& o2): Performs bitwise AND NOT on two dwords in K registers.
- **kandnq**(const KReg& o0, const KReg& o1, const KReg& o2): Performs bitwise AND NOT on two qwords in K registers.
- **kandnw**(const KReg& o0, const KReg& o1, const KReg& o2): Performs bitwise AND NOT on two words in K registers.
- **kandq**(const KReg& o0, const KReg& o1, const KReg& o2): Performs bitwise AND on two qwords in K registers.
- **kandw**(const KReg& o0, const KReg& o1, const KReg& o2): Performs bitwise AND on two words in K registers.
- **kmovb**(const KReg& o0, const KReg& o1): Moves a byte from one K register to another.
- **kmovd**(const KReg& o0, const KReg& o1): Moves a dword from one K register to another.
- **kmovq**(const KReg& o0, const KReg& o1): Moves a qword from one K register to another.
- **kmovw**(const KReg& o0, const KReg& o1): Moves a word from one K register to another.
- **knotb**(const KReg& o0, const KReg& o1): Performs bitwise NOT on a byte in a K register.
- **knotd**(const KReg& o0, const KReg& o1): Performs bitwise NOT on a dword in a K register.
- **knotq**(const KReg& o0, const KReg& o1): Performs bitwise NOT on a qword in a K register.
- **knotw**(const KReg& o0, const KReg& o1): Performs bitwise NOT on a word in a K register.
- **korb**(const KReg& o0, const KReg& o1, const KReg& o2): Performs bitwise OR on two bytes in K registers.
- **kord**(const KReg& o0, const KReg& o1, const KReg& o2): Performs bitwise OR on two dwords in K registers.
- **korq**(const KReg& o0, const KReg& o1, const KReg& o2): Performs bitwise OR on two qwords in K registers.
- **kortestb**(const KReg& o0, const KReg& o1): Tests bits in two bytes of K registers.
- **kortestd**(const KReg& o0, const KReg& o1): Tests bits in two dwords of K registers.
- **kortestq**(const KReg& o0, const KReg& o1): Tests bits in two qwords of K registers.
- **kortestw**(const KReg& o0, const KReg& o1): Tests bits in two words of K registers.
- **korw**(const KReg& o0, const KReg& o1, const KReg& o2): Performs bitwise OR on two words in K registers.
- **kshiftlb**(const KReg& o0, const KReg& o1, const Imm& o2): Performs a left byte shift on a K register.
- **kshiftld**(const KReg& o0, const KReg& o1, const Imm& o2): Performs a left dword shift on a K register.
- **kshiftlq**(const KReg& o0, const KReg& o1, const Imm& o2): Performs a left qword shift on a K register.
- **kshiftlw**(const KReg& o0, const KReg& o1, const Imm& o2): Performs a left word shift on a K register.
- **kshiftrb**(const KReg& o0, const KReg& o1, const Imm& o2): Performs a right byte shift on a K register.
- **kshiftrd**(const KReg& o0, const KReg& o1, const Imm& o2): Performs a right dword shift on a K register.
- **kshiftrq**(const KReg& o0, const KReg& o1, const Imm& o2): Performs a right qword shift on a K register.
- **kshiftrw**(const KReg& o0, const KReg& o1, const Imm& o2): Performs a right word shift on a K register.
- **ktestb**(const KReg& o0, const KReg& o1): Tests bytes in two K registers.
- **ktestd**(const KReg& o0, const KReg& o1): Tests dwords in two K registers.
- **ktestq**(const KReg& o0, const KReg& o1): Tests qwords in two K registers.
- **ktestw**(const KReg& o0, const KReg& o1): Tests words in two K registers.
- **kunpckbw**(const KReg& o0, const KReg& o1, const KReg& o2): Unpacks bytes and words from K registers.
- **kunpckdq**(const KReg& o0, const KReg& o1, const KReg& o2): Unpacks doublewords and quadwords from K registers.
- **kunpckwd**(const KReg& o0, const KReg& o1, const KReg& o2): Unpacks words and doublewords from K registers.
- **kxnorb**(const KReg& o0, const KReg& o1, const KReg& o2): Performs bitwise XNOR on two bytes in K registers.
- **kxnord**(const KReg& o0, const KReg& o1, const KReg& o2): Performs bitwise XNOR on two dwords in K registers.
- **kxnorq**(const KReg& o0, const KReg& o1, const KReg& o2): Performs bitwise XNOR on two qwords in K registers.
- **kxnorw**(const KReg& o0, const KReg& o1, const KReg& o2): Performs bitwise XNOR on two words in K registers.
- **kxorb**(const KReg& o0, const KReg& o1, const KReg& o2): Performs bitwise XOR on two bytes in K registers.
- **kxord**(const KReg& o0, const KReg& o1, const KReg& o2): Performs bitwise XOR on two dwords in K registers.
- **kxorq**(const KReg& o0, const KReg& o1, const KReg& o2): Performs bitwise XOR on two qwords in K registers.
- **kxorw**(const KReg& o0, const KReg& o1, const KReg& o2): Performs bitwise XOR on two words in K registers.
```

--------------------------------

### Section Management

Source: https://asmjit.com/doc/classasmjit_1_1x86_1_1Compiler

API for managing code sections.

```APIDOC
## Section Management

### Description
API for managing code sections within the emitter.

### Endpoints

#### `section`

##### Description
Sets the current section for code emission.

##### Method

##### Parameters
- **section** (Section*) - A pointer to the `Section` object to set as current.

##### Return Value
Error - An error code indicating success or failure.

```

--------------------------------

### SIMD/SSE AES Instructions

Source: https://asmjit.com/doc/classasmjit_1_1x86_1_1Compiler

Documentation for SSE instructions related to AES encryption/decryption.

```APIDOC
## SIMD/SSE AES Instructions

### Description
Provides documentation for SIMD instructions used in AES encryption and decryption.

### AES Instructions
- **aesdec**(const Vec& o0, const Vec& o1): Performs one round of AES decryption.
- **aesdeclast**(const Vec& o0, const Vec& o1): Performs the last round of AES decryption.
- **aesenc**(const Vec& o0, const Vec& o1): Performs one round of AES encryption.
- **aesenclast**(const Vec& o0, const Vec& o1): Performs the last round of AES encryption.
- **aesimc**(const Vec& o0, const Vec& o1): Performs the AES inverse mix columns transformation.
- **aeskeygenassist**(const Vec& o0, const Vec& o1, const Imm& o2): Computes the AES round key.
```

--------------------------------

### new_const

Source: https://asmjit.com/doc/classasmjit_1_1x86_1_1Compiler

Put data to a constant-pool and get a memory reference to it.

```APIDOC
## Mem x86::Compiler::**new_const**(
ConstPoolScope _scope_ ,
const void* _data_ ,
size_t _size_
)

### Description
Put data to a constant-pool and get a memory reference to it.

### Method
N/A

### Endpoint
N/A

### Parameters
#### Parameters
- **_scope_** (ConstPoolScope) - Required - Scope of the constant pool.
- **_data_** (const void*) - Required - Pointer to the data to be placed in the constant pool.
- **_size_** (size_t) - Required - Size of the data.

### Request Example
N/A

### Response
#### Success Response
- **Mem** (Mem) - Memory operand representing the constant data.

#### Response Example
N/A
```

--------------------------------

### VPTERNLOG Immediate Creation

Source: https://asmjit.com/doc/group__asmjit__x86

Functions to create immediates for VPTERNLOG instructions.

```APIDOC
## TLogImm x86::tlog_from_bits(uint8_t _b000_, uint8_t _b001_, uint8_t _b010_, uint8_t _b011_, uint8_t _b100_, uint8_t _b101_, uint8_t _b110_, uint8_t _b111_)

### Description
Creates an immediate that can be used by VPTERNLOG[D|Q] instructions.

### Method
N/A (Function call)

### Endpoint
N/A

### Parameters
#### Path Parameters
N/A

#### Query Parameters
N/A

#### Request Body
N/A

### Request Example
```
x86::tlog_from_bits(0, 1, 2, 3, 4, 5, 6, 7)
```

### Response
#### Success Response (200)
- **TLogImm** - The created TLogImm value.

#### Response Example
```
// Representation of TLogImm
```

## TLogImm x86::tlog_if_else(TLogImm _condition_, TLogImm _a_, TLogImm _b_)

### Description
Creates an if/else logic that can be used by VPTERNLOG[D|Q] instructions.

### Method
N/A (Function call)

### Endpoint
N/A

### Parameters
#### Path Parameters
N/A

#### Query Parameters
N/A

#### Request Body
N/A

### Request Example
```
x86::tlog_if_else(condition_imm, a_imm, b_imm)
```

### Response
#### Success Response (200)
- **TLogImm** - The created TLogImm value representing the if/else logic.

#### Response Example
```
// Representation of TLogImm for if/else logic
```
```

--------------------------------

### BaseEmitter - Emitter Configuration and State

Source: https://asmjit.com/doc/classasmjit_1_1x86_1_1Assembler

Details on how to query and configure the emitter, including its type, architecture, logger, error handling, and encoding options.

```APIDOC
## BaseEmitter - Emitter Configuration and State

### Description
Provides methods for querying the emitter's type, architecture, and state, as well as managing its logger, error handler, and various encoding/diagnostic options.

### Methods
- `BaseEmitter(EmitterType emitter_type)`: Constructor.
- `as<T>()`: Casts the emitter to a specific type `T`.
- `as<T>() const`: Casts the emitter to a specific type `T` (const version).
- `emitter_type()`: Returns the type of the emitter.
- `emitter_flags()`: Returns the flags associated with the emitter.
- `is_assembler()`, `is_builder()`, `is_compiler()`: Checks the emitter's role.
- `has_emitter_flag(EmitterFlags flag)`: Checks if a specific emitter flag is set.
- `is_finalized()`, `is_destroyed()`, `is_initialized()`: Checks the emitter's lifecycle state.
- `code()`: Returns a pointer to the associated `CodeHolder`.
- `environment()`: Returns the `Environment` object used by the emitter.
- `is_32bit()`, `is_64bit()`: Checks the target architecture's bitness.
- `arch()`: Returns the target architecture.
- `sub_arch()`: Returns the sub-architecture.
- `register_size()`: Returns the size of registers.
- `gp_signature()`: Returns the signature of general-purpose registers.
- `instruction_alignment()`: Returns the required alignment for instructions.
- `finalize()`: Finalizes the generated code.
- `logger()`: Returns a pointer to the logger.
- `set_logger(Logger* logger)`: Sets a custom logger.
- `reset_logger()`: Resets the logger to default.
- `has_logger()`: Checks if a logger is attached.
- `has_own_logger()`: Checks if the emitter owns the logger.
- `error_handler()`: Returns a pointer to the error handler.
- `set_error_handler(ErrorHandler* error_handler)`: Sets a custom error handler.
- `reset_error_handler()`: Resets the error handler to default.
- `has_error_handler()`: Checks if an error handler is attached.
- `has_own_error_handler()`: Checks if the emitter owns the error handler.
- `report_error(Error err, const char* message = nullptr)`: Reports an error.
- `encoding_options()`: Returns the current encoding options.
- `has_encoding_option(EncodingOptions option)`: Checks if a specific encoding option is set.
- `add_encoding_options(EncodingOptions options)`: Adds encoding options.
- `clear_encoding_options(EncodingOptions options)`: Clears encoding options.
- `diagnostic_options()`: Returns the current diagnostic options.
- `has_diagnostic_option(DiagnosticOptions option)`: Checks if a specific diagnostic option is set.
- `add_diagnostic_options(DiagnosticOptions options)`: Adds diagnostic options.
- `clear_diagnostic_options(DiagnosticOptions options)`: Clears diagnostic options.
- `forced_inst_options()`: Returns the forced instruction options.
- `inst_options()`: Returns the current instruction options.
- `set_inst_options(InstOptions options)`: Sets instruction options.
- `add_inst_options(InstOptions options)`: Adds instruction options.
- `reset_inst_options()`: Resets instruction options.
- `has_extra_reg()`: Checks if an extra register is configured.
- `extra_reg()`: Returns the extra register.
- `set_extra_reg(const Reg& reg)`: Sets the extra register.
- `set_extra_reg(const RegOnly& reg)`: Sets the extra register (reg-only version).
- `reset_extra_reg()`: Resets the extra register.
- `inline_comment()`: Returns the current inline comment.
- `set_inline_comment(const char* s)`: Sets an inline comment.
- `reset_inline_comment()`: Resets the inline comment.
- `reset_state()`: Resets the emitter's state.
- `new_named_label(Span<const char>name, LabelType type = LabelType::kGlobal, uint32_t parent_id = Globals::kInvalidId)`: Creates a new named label using a span.
- `new_anonymous_label(const char* name, size_t name_size = SIZE_MAX)`: Creates a new anonymous label.
- `new_anonymous_label(Span<const char>name)`: Creates a new anonymous label using a span.
- `new_external_label(const char* name, size_t name_size = SIZE_MAX)`: Creates a new external label.
- `new_external_label(Span<const char>name)`: Creates a new external label using a span.
- `label_by_name(const char* name, size_t name_size = SIZE_MAX, uint32_t parent_id = Globals::kInvalidId)`: Retrieves a label by its name.
- `label_by_name(Span<const char>name, uint32_t parent_id = Globals::kInvalidId)`: Retrieves a label by its name using a span.
- `is_label_valid(uint32_t label_id)`: Checks if a label ID is valid.
- `is_label_valid(const Label& label)`: Checks if a label is valid.
- `_emitI(InstId inst_id)`: Emits an instruction with no operands.
- `_emitI(InstId inst_id, const Operand_& o0)`: Emits an instruction with one operand.
- `_emitI(InstId inst_id, const Operand_& o0, const Operand_& o1)`: Emits an instruction with two operands.
```

--------------------------------

### Get Index of Variable Arguments

Source: https://asmjit.com/doc/classasmjit_1_1FuncDetail

Returns the index associated with the start of variable arguments in the function signature. This is relevant for variadic functions.

```cpp
uint32_t va_index() const noexcept
```

--------------------------------

### Get Zero-Idiomatic Registers (C++)

Source: https://asmjit.com/doc/classasmjit_1_1x86_1_1Assembler

Retrieves zero-idiomatic general-purpose registers (e.g., ZAX, ZCX) for use in assembly generation. These registers are guaranteed to be zero.

```cpp
Gp gpz(uint32_t id) const noexcept
Gp zax() const noexcept
Gp zcx() const noexcept
```

--------------------------------

### SIMD/SSE GF2P8 Instructions

Source: https://asmjit.com/doc/classasmjit_1_1x86_1_1Compiler

Documentation for SSE instructions related to GF(2^8) arithmetic.

```APIDOC
## SIMD/SSE GF2P8 Instructions

### Description
Details SIMD instructions for Galois Field GF(2^8) operations.

### GF2P8 Instructions
- **gf2p8affineinvqb**(const Vec& o0, const Vec& o1, const Imm& o2): Performs GF(2^8) affine transformation inverse.
- **gf2p8affineqb**(const Vec& o0, const Vec& o1, const Imm& o2): Performs GF(2^8) affine transformation.
- **gf2p8mulb**(const Vec& o0, const Vec& o1): Performs GF(2^8) multiplication by a byte.
```

--------------------------------

### Tile Zero Instruction (asmjit)

Source: https://asmjit.com/doc/classasmjit_1_1x86_1_1Assembler

Documents the `tilezero` instruction, which is used to initialize a tile register to zero. This is essential for starting computations involving tiles.

```C++
Error **tilezero**(const Tmm& o0)
```

--------------------------------

### Get Label Offset Relative to Section or Base - C++

Source: https://asmjit.com/doc/group__asmjit__core

Shows how to retrieve a label's offset after it has been bound. It demonstrates getting the offset relative to the start of the section using `label_offset` and the offset relative to the code base using `label_offset_from_base`. The function prints both offsets, noting that `label_offset` returns zero if the label is not bound.

```cpp
#include <asmjit/core.h>
#include <stdio.h>
using namespace asmjit;
void labelOffsetExample(CodeHolder& code, const Label& label) {
// Label offset is known after it's bound. The offset provided is relative
// to the start of the section, see below for alternative. If the given
// label is not bound the offset returned will be zero. It's recommended
// to always check whether the label is bound before using its offset.
uint64_t section_offset = code.label_offset(label);
printf("Label offset relative to section: %llu\n", (unsigned long long)section_offset);
// If you use multiple sections and want the offset relative to the base.
// NOTE: This function expects that the section has already an offset and
// the label-link was resolved (if this is not true you will still get an
// offset relative to the start of the section).
uint64_t base_offset = code.label_offset_from_base(label);
printf("Label offset relative to base: %llu\n", (unsigned long long)base_offset);
}
```

--------------------------------

### PAC and Hint Instructions

Source: https://asmjit.com/doc/classasmjit_1_1a64_1_1Emitter

Documentation for PAC instructions and hint instructions.

```APIDOC
## PAC and Hint Instructions (xpacd, xpaci, xpaclri, hint)

### Description
Covers instructions for invalidating PACs and generic hint instructions that provide hints to the processor.

### Method
N/A

### Endpoint
N/A

### Parameters
#### Path Parameters
None

#### Query Parameters
None

#### Request Body
None

### Request Example
None

### Response
#### Success Response (200)
N/A

#### Response Example
None
```

--------------------------------

### asmjit: Node List and Cursor Management

Source: https://asmjit.com/doc/classasmjit_1_1x86_1_1Compiler

Provides methods for accessing and manipulating the list of nodes within the builder. This includes getting the first/last node, adding nodes, and setting a cursor for insertion points.

```cpp
NodeList node_list() const noexcept
BaseNode* first_node() const noexcept
BaseNode* last_node() const noexcept
BaseNode* cursor() const noexcept
BaseNode* set_cursor(BaseNode* node) noexcept
```

--------------------------------

### Backend APIs

Source: https://asmjit.com/doc/structasmjit_1_1Globals_1_1NoInit__

Documentation for AsmJit's support for different CPU architectures.

```APIDOC
## Backend APIs

This section details the API support for various CPU architectures.

### X86 Backend

API for generating machine code for the x86 architecture.

### ARM Commons

Common API elements for ARM architectures.

### AArch64 Backend

API for generating machine code for the AArch64 (ARM64) architecture.

### UJIT

API related to the UJIT (Universal Just-In-Time) compilation.
```

--------------------------------

### Get Label Offset by ID in AsmJit

Source: https://asmjit.com/doc/classasmjit_1_1CodeHolder

Returns the offset of a label, specified by its ID, relative to the start of its bound section. Unbound labels return an offset of zero. The label ID must be valid.

```cpp
uint64_t CodeHolder::label_offset(uint32_t _label_id_) const noexcept
```

```cpp
uint64_t CodeHolder::label_offset(const Label& _label_) const noexcept
```

--------------------------------

### Get Stack Alignment Properties

Source: https://asmjit.com/doc/classasmjit_1_1FuncFrame

Retrieves various stack alignment values for a function frame, including minimum dynamic, call stack, local stack, and final stack alignments. These values are crucial for correct stack frame setup and function calls.

```cpp
uint32_t FuncFrame::min_dynamic_alignment() const noexcept;
uint32_t FuncFrame::call_stack_alignment() const noexcept;
uint32_t FuncFrame::local_stack_alignment() const noexcept;
uint32_t FuncFrame::final_stack_alignment() const noexcept;
```

--------------------------------

### CodeHolder & Emitters Example

Source: https://asmjit.com/doc/group__asmjit__core

Demonstrates how to use `CodeHolder` and `x86::Assembler` to generate simple X86 code and execute it.

```APIDOC
## CodeHolder & Emitters Example

### Description
This example shows how `CodeHolder` and `x86::Assembler` interact to generate X86 code and execute it.

### Method
N/A (Illustrative Code)

### Endpoint
N/A (Illustrative Code)

### Request Example
```cpp
#include <asmjit/x86.h>
#include <stdio.h>

using namespace asmjit;

// Signature of the generated function.
using Func = int (*)(void);

int main() {
    JitRuntime rt; // Runtime specialized for JIT code execution.
    CodeHolder code; // Holds code and relocation information.

    code.init(rt.environment(), rt.cpu_features()); // Initialize code to match the JIT environment.
    x86::Assembler a(&code); // Create and attach x86::Assembler to code.

    a.mov(x86::eax, 1); // Move one to eax register.
    a.ret(); // Return from function.

    // ===== x86::Assembler is no longer needed from here and can be destroyed =====

    Func fn; // Holds address to the generated function.
    Error err = rt.add(&fn, &code); // Add the generated code to the runtime.

    if (err != Error::kOk) {
        return 1; // Handle a possible error returned by AsmJit.
    }

    // ===== CodeHolder is no longer needed from here and can be destroyed =====

    int result = fn(); // Execute the generated code.
    printf("%d\n", result); // Print the resulting "1".

    // All classes use RAII, all resources will be released before `main()` returns,
    // the generated function can be, however, released explicitly if you intend to
    // reuse or keep the runtime alive, which you should in a production-ready code.
    rt.release(fn);
    return 0;
}
```

### Response
#### Success Response (Execution Output)
```
1
```

### Emitter Types
AsmJit provides the following emitters that offer various levels of abstraction:

*   **Assembler**: Low-level emitter that emits directly to `CodeBuffer`.
*   **Builder**: Low-level emitter that emits to a `BaseNode` list.
*   **Compiler**: High-level emitter that provides register allocation.
```

--------------------------------

### Store Instructions

Source: https://asmjit.com/doc/classasmjit_1_1a64_1_1Emitter

Documentation for various store instructions, including their parameters and usage.

```APIDOC
## Store Instructions (stumin, stur, stxp, stlxp, stxr, stxrb, stxrh, swp, swpa, swpab, swpah, swpal, swpalb, swpalh, swpb, swph, swpl, swplb, swplh)

### Description
This group of functions represents various store instructions used for memory operations. They differ in the size and addressing modes they support.

### Method
N/A (These are function signatures, not HTTP endpoints)

### Endpoint
N/A

### Parameters
#### Path Parameters
None

#### Query Parameters
None

#### Request Body
None

### Request Example
None

### Response
#### Success Response (200)
This documentation describes function signatures, not API responses.

#### Response Example
None
```

--------------------------------

### AsmJit Constant Pool Usage Example

Source: https://asmjit.com/doc/classasmjit_1_1x86_1_1Compiler

Illustrates using AsmJit's constant pool to embed integer constants within generated code. This example shows how to create local constants and use them in arithmetic operations.

```cpp
#include <asmjit/x86.h>
using namespace asmjit;
static void example_use_of_const_pool(x86::Compiler& cc) {
cc.add_func(FuncSignature::build<int>());
x86::Gp v0 = cc.new_gp32("v0");
x86::Gp v1 = cc.new_gp32("v1");
x86::Mem c0 = cc.new_int32_const(ConstPoolScope::kLocal, 200);
x86::Mem c1 = cc.new_int32_const(ConstPoolScope::kLocal, 33);
cc.mov(v0, c0);
cc.mov(v1, c1);
cc.add(v0, v1);
cc.ret(v0);
cc.end_func();
}
```

--------------------------------

### AsmJit Basic Setup (C++)

Source: https://asmjit.com/doc/group__asmjit__breaking__changes

Demonstrates the basic setup of JitRuntime and CodeHolder in AsmJit, utilizing environment() for configuration.

```cpp
#include <asmjit/x86.h>
using namespace asmjit;
void basicSetup() {
JitRuntime rt;
CodeHolder code(rt.environment());
}
```

--------------------------------

### System and Memory Management Instructions

Source: https://asmjit.com/doc/classasmjit_1_1x86_1_1Assembler

Documentation for instructions related to system management, memory access, and cache control, including CLZERO, RDPCRU, RDPMC, MWAIT, MONITOR, and various XSTATE instructions.

```APIDOC
## System and Memory Management Instructions

### Description
This section details instructions for system-level operations, including cache zeroing (CLZERO), processor information retrieval (RDPCRU, RDPMC), thread suspension (MWAIT, MWAITX), processor monitoring (MONITOR, MONITORX), and advanced processor state management (XGETBV, XRESTOR*, XSAV*, SYSCALL, SYSENTER, etc.).

### Method
`Error clzero()`
`Error rdpru()`
`Error rdpkru()`
`Error rdtsc()`
`Error rdtscp()`
`Error mulx(const Gp& o0, const Gp& o1, const Gp& o2)`
`Error xgetbv()`
`Error xrstor(const Mem& o0)`
`Error xrstor64(const Mem& o0)`
`Error xrstors(const Mem& o0)`
`Error xrstors64(const Mem& o0)`
`Error xsave(const Mem& o0)`
`Error xsave64(const Mem& o0)`
`Error xsavec(const Mem& o0)`
`Error xsavec64(const Mem& o0)`
`Error xsaveopt(const Mem& o0)`
`Error xsaveopt64(const Mem& o0)`
`Error xsaves(const Mem& o0)`
`Error xsaves64(const Mem& o0)`
`Error syscall()`
`Error sysenter()`
`Error hreset(const Imm& o0)`
`Error seamcall()`
`Error seamops()`
`Error seamret()`
`Error tdcall()`
`Error pconfig()`
`Error rdmsr()`
`Error rdpmc()`
`Error sysexit()`
`Error sysexitq()`
`Error sysret()`
`Error sysretq()`
`Error wrmsr()`
`Error xsetbv()`
`Error monitor()`
`Error monitorx()`
`Error mwait()`
`Error mwaitx()`
`Error tpause(const Gp& o0)`
`Error umwait(const Gp& o0)`

### Endpoints
N/A (Member functions)

### Parameters
- **Gp** - Represents a general-purpose register.
- **Mem** - Represents a memory operand.
- **Imm** - Represents an immediate value.

### Request Example
```cpp
// Read Time-Stamp Counter
assembler.rdtsc();

// Save processor extended states
Mem state_buffer;
assembler.xsave(state_buffer);

// Execute a system call
assembler.syscall();
```

### Response
#### Success Response
- **Error** - Returns `Error::kOk` on successful emission, or an error code on failure.
```

--------------------------------

### Store General and Zero Instructions

Source: https://asmjit.com/doc/classasmjit_1_1a64_1_1Emitter

Documentation for various store instructions, including those involving general registers and zeroing.

```APIDOC
## Store General and Zero Instructions (st2g, stg, stgp, stgm, stzg, stz2g, stzgm)

### Description
This group of functions handles storing data to memory, including general-purpose stores and stores that involve zeroing specific fields.

### Method
N/A

### Endpoint
N/A

### Parameters
#### Path Parameters
None

#### Query Parameters
None

#### Request Body
None

### Request Example
None

### Response
#### Success Response (200)
N/A

#### Response Example
None
```

--------------------------------

### Format Instructions

Source: https://asmjit.com/doc/group__asmjit__logging

Illustrates formatting entire x86/x64 instructions along with their operands.

```APIDOC
## POST /api/format/instruction

### Description
Formats an entire instruction, including its mnemonic and operands.

### Method
POST

### Endpoint
/api/format/instruction

### Parameters
#### Query Parameters
- **arch** (string) - Required - The target architecture (e.g., "X64", "ARM").
- **flags** (string) - Optional - Formatting flags (e.g., "kMachineCode", "kExplainImms").

#### Request Body
- **instruction** (object) - Required - The instruction to format.
  - **id** (string) - Required - The instruction identifier (e.g., "kIdMov", "kIdAdd").
  - **options** (string) - Optional - Instruction options (e.g., "kX86_Lock", "kX86_ZMask").
  - **extra_reg** (string) - Optional - An extra register identifier if applicable (e.g., a mask register).
- **operands** (array) - Optional - An array of operands for the instruction. Each operand follows the structure defined in the 'Format Operands' endpoint.

### Request Example
```json
{
  "arch": "X64",
  "instruction": {
    "id": "kIdVaddpd",
    "extra_reg": "k2"
  },
  "operands": [
    {
      "type": "Register",
      "value": "zmm0"
    },
    {
      "type": "Register",
      "value": "zmm1"
    },
    {
      "type": "Memory",
      "base": "rax",
      "size": 8,
      "options": "1to8"
    }
  ]
}
```

### Response
#### Success Response (200)
- **formatted_string** (string) - The formatted string representation of the instruction.

#### Response Example
```json
{
  "formatted_string": "vaddpd zmm0 {k2} {z}, zmm1, [rax] {1to8}"
}
```
```

--------------------------------

### AsmJit: Lock Prefix for Atomics

Source: https://asmjit.com/doc/classasmjit_1_1x86_1_1Assembler

Shows how to use the 'lock' prefix with AsmJit for implementing atomic operations. The example demonstrates locking an `add` operation on a memory operand.

```cpp
#include <asmjit/x86.h>
using namespace asmjit;
void prefixes_example(x86::Assembler& a) {
// Lock prefix for implementing atomics:
// lock add dword ptr [rdi], 1
a.lock().add(x86::dword_ptr(x86::rdi), 1);
}
```

--------------------------------

### Creating and Managing Sections

Source: https://asmjit.com/doc/group__asmjit__core

Demonstrates how to create new sections, switch between them using an assembler, and bind labels within different sections.

```APIDOC
## POST /websites/asmjit_doc/sections

### Description
This API allows for the creation and management of code and data sections within the AsmJit framework. It covers initializing sections, switching contexts between them, and binding labels to specific locations within these sections.

### Method
POST

### Endpoint
/websites/asmjit_doc/sections

### Parameters
#### Path Parameters
- None

#### Query Parameters
- None

#### Request Body
- **code_holder** (object) - Required - The CodeHolder object to manage sections for.
- **section_name** (string) - Optional - The name for the new section (e.g., ".data"). Defaults to the default section name if not provided.
- **section_size** (integer) - Optional - The maximum size of the section. Defaults to SIZE_MAX.
- **section_flags** (enum) - Optional - Flags for the section. Defaults to SectionFlags::kNone.
- **section_alignment** (integer) - Optional - The alignment of the section. Must be a power of 2. Defaults to 8.
- **section_order** (integer) - Optional - The order value for the section. Defaults to 0.

### Request Example
```json
{
  "code_holder": "<CodeHolder object>",
  "section_name": ".data",
  "section_alignment": 8
}
```

### Response
#### Success Response (200)
- **section** (object) - A pointer to the newly created section.
- **error** (enum) - The result of the operation (Error::kOk on success).

#### Response Example
```json
{
  "section": "<Section object>",
  "error": "kOk"
}
```
```

--------------------------------

### Get Label Name Size - C++

Source: https://asmjit.com/doc/classasmjit_1_1LabelEntry

Returns the size of the label's name, excluding the null terminator. This is an optimized way to get the name length compared to using strlen().

```C++
uint32_t LabelEntry::name_size() const noexcept
```

--------------------------------

### AsmJit: AVX512 Opmask and Zeroing

Source: https://asmjit.com/doc/classasmjit_1_1x86_1_1Assembler

Provides an example of generating AVX512 code using opmask registers and the zeroing ({z}) option with AsmJit. This showcases how to control instruction execution based on masks.

```cpp
#include <asmjit/x86.h>
using namespace asmjit;
void generate_avx512_code(x86::Assembler& a) {
using namespace x86;
// Opmask Selectors
// ----------------
//
// - Opmask / zeroing is part of the instruction options / extra_reg.
// - k(reg) is like {kreg} in Intel syntax.
// - z() is like {z} in Intel syntax.
// vaddpd zmm {k1} {z}, zmm1, zmm2
a.k(k1).z().vaddpd(zmm0, zmm1, zmm2);
}
```

--------------------------------

### Build Instructions

Source: https://asmjit.com/doc/structasmjit_1_1Support_1_1ByteSizeOrLog2Size

Information on how to build and compile the AsmJit library.

```APIDOC
## GET /api/asmjit/build-instructions

### Description
Provides detailed instructions for building the AsmJit library from source.

### Method
GET

### Endpoint
/api/asmjit/build-instructions

### Parameters
#### Query Parameters
- **platform** (string) - Optional - Specify the target platform (e.g., 'windows', 'linux', 'macos').
- **compiler** (string) - Optional - Specify the compiler (e.g., 'msvc', 'gcc', 'clang').

### Response
#### Success Response (200)
- **instructions** (string) - The build instructions in markdown format.

#### Response Example
```markdown
# Building AsmJit

1. Clone the repository:
   ```bash
   git clone https://github.com/asmjit/asmjit.git
   cd asmjit
   ```

2. Create a build directory:
   ```bash
   mkdir build
   cd build
   ```

3. Configure the build (using CMake):
   ```bash
   cmake .. -DCMAKE_BUILD_TYPE=Release
   ```

4. Build the library:
   ```bash
   cmake --build .
   ```
```
```

--------------------------------

### asmjit::x86::Gp Constructor Examples

Source: https://asmjit.com/doc/classasmjit_1_1x86_1_1Gp

Provides examples of different constructors for the `asmjit::x86::Gp` class, including default, copy, and constructors that take an operand signature and ID.

```cpp
asmjit::x86::Gp gp_reg;
asmjit::x86::Gp gp_reg_copy(other_gp_reg);
asmjit::x86::Gp gp_reg_signed(sgn, id);
```