### Check NEORV32 Toolchain Setup Source: https://github.com/stnolting/neorv32/blob/main/docs/userguide/sw_toolchain_setup.adoc Navigate to an example project directory and run `make check` to verify that all necessary tools for generating NEORV32 executables are correctly configured and accessible. ```bash neorv32/sw/example/demo_blink_led$ make check ``` -------------------------------- ### Build and Simulate Hello World Example Source: https://github.com/stnolting/neorv32/blob/main/docs/userguide/simulating_the_processor.adoc Run this command in the 'sw/example/hello_world' directory to clean, install, and simulate the application. The USER_FLAGS+=-DUART0_SIM_MODE flag enables simulation mode for UART0, directing output to the simulator console. ```bash neorv32/sw/example/hello_world$ make USER_FLAGS+=-DUART0_SIM_MODE clean install sim ``` -------------------------------- ### NEORV32 Test Setup Ports Source: https://github.com/stnolting/neorv32/blob/main/docs/userguide/general_hw_setup.adoc Example ports for the `neorv32_test_setup_bootloader.vhd` entity, including clock, reset, GPIO, and UART signals. ```vhdl port ( -- Global control -- clk_i : in std_ulogic; -- global clock, rising edge rstn_i : in std_ulogic; -- global reset, low-active, async -- GPIO -- gpio_o : out std_ulogic_vector(7 downto 0); -- parallel output -- UART0 -- uart0_txd_o : out std_ulogic; -- UART0 send data uart0_rxd_i : in std_ulogic -- UART0 receive data ); ``` -------------------------------- ### System Configuration Information Example Source: https://github.com/stnolting/neorv32/blob/main/docs/datasheet/software_bootloader.adoc Example output of the 'i' command in the NEORV32 bootloader, showing hardware version, clock frequency, and CPU configuration details. ```text CMD:> i HWV: 0x01120101 <1> CLK: 0x05f5e100 <2> MISA: 0x40901107 <3> XISA: 0x00000000:0x0fc06fd3 <4> SOC: 0x38efc87b <5> MISC: 0x0a010d00 <6> CMD:> ``` -------------------------------- ### Generate and Install IMEM Initialization File Source: https://github.com/stnolting/neorv32/blob/main/docs/userguide/installing_an_executable.adoc Use the `make` command to clean, regenerate the image, and install the application firmware into the IMEM initialization file. This process also shows the memory utilization of the compiled application. ```bash neorv32/sw/example/demo_blink_led$ make clean_all image install Memory utilization: text data bss dec hex filename 22192 1352 4216 27760 6c70 main.elf Compiling image generator... Generating neorv32_imem_image.vhd Installing application image to ../../../rtl/core/neorv32_imem_image.vhd ``` -------------------------------- ### Setup NEORV32 Runtime Environment and Interrupts Source: https://context7.com/stnolting/neorv32/llms.txt Initializes the runtime environment for trap handling and installs a custom handler for machine timer interrupts. Ensure global interrupts are enabled. ```c #include // Custom interrupt handler function void my_timer_handler(void) { // Handle timer interrupt neorv32_clint_mtimecmp_set(neorv32_clint_mtimecmp_get() + neorv32_sysinfo_get_clk()); neorv32_uart0_puts("Timer interrupt!\n"); } int main() { // Initialize runtime environment - captures all exceptions neorv32_rte_setup(); // Install custom handler for machine timer interrupt neorv32_rte_handler_install(TRAP_CODE_MTI, my_timer_handler); // Enable timer interrupt and global interrupts neorv32_cpu_csr_set(CSR_MIE, 1 << CSR_MIE_MTIE); neorv32_cpu_csr_set(CSR_MSTATUS, 1 << CSR_MSTATUS_MIE); // Uninstall handler when no longer needed neorv32_rte_handler_uninstall(TRAP_CODE_MTI); return 0; } ``` -------------------------------- ### Start NEORV32 Simulation Source: https://github.com/stnolting/neorv32/blob/main/docs/userguide/litex_support.adoc Use this command to initiate a simulation of the NEORV32 processor with LiteX. This command starts the LiteX simulator with the NEORV32 as the target CPU. ```bash $ litex_sim --cpu-type=neorv32 ``` -------------------------------- ### Using Tracer Commands in GDB Source: https://github.com/stnolting/neorv32/blob/main/docs/datasheet/soc_tracer.adoc Example of compiling, loading, running, sourcing the tracer script, and retrieving trace data using GDB. ```gdb (gdb) make clean elf <1> ... (gdb) load <2> ... (gdb) c <3> ... (gdb) source neorv32_tracer.gdb <4> (gdb) tracer_get <5> [0] SRC: 0x3b0 -> DST: 0x2cc Line 128 of "main.c" starts at address 0x3b0 and ends at 0x3b4 . Line 68 of "main.c" starts at address 0x2cc and ends at 0x2d0 . ... ``` -------------------------------- ### Start GDB Debug Session Source: https://github.com/stnolting/neorv32/blob/main/docs/userguide/using_ocd.adoc Use this makefile target to start a pre-configured GDB debug session. It assumes 'main.elf' is the executable and connects to localhost:3333. ```bash make gdb ``` -------------------------------- ### Simulate NEORV32 Verilog with Verilator Source: https://github.com/stnolting/neorv32/blob/main/docs/userguide/neorv32_in_verilog.adoc Start the simulation of the Verilog design using Verilator. The simulation checks for the bootloader intro string. ```bash neorv32/rtl/verilog$ make SIMULATOR=verilator sim ``` -------------------------------- ### Build Documentation Using Docker Source: https://github.com/stnolting/neorv32/blob/main/docs/userguide/building_the_documentation.adoc If asciidoctor or asciidoctor-pdf are not installed, use the 'container' target with the makefile to build all documentation via a Docker container. ```bash make container ``` -------------------------------- ### Simulate NEORV32 Verilog with Icarus Verilog Source: https://github.com/stnolting/neorv32/blob/main/docs/userguide/neorv32_in_verilog.adoc Start the simulation of the Verilog design using Icarus Verilog. The simulation checks for the bootloader intro string. ```bash neorv32/rtl/verilog$ make SIMULATOR=iverilog sim ``` -------------------------------- ### Compile and Run Arith Instruction Test Source: https://github.com/stnolting/neorv32/blob/main/sw/example/performance_tests/I/README.md Example command to compile and run the Arith instruction performance test suite using the NEORV32 build system. ```bash make USER_FLAGS+=-DRUN_CHECK USER_FLAGS+=-DUART0_SIM_MODE USER_FLAGS+=-Drv32I_arith clean_all exe make sim ``` -------------------------------- ### Configure JTAG Interface and Target Source: https://github.com/stnolting/neorv32/blob/main/docs/datasheet/on_chip_debugger.adoc These commands source configuration scripts to set up the JTAG interface, target, authentication, and start the NEORV32 processor. Replace custom adapter setups as needed. ```tcl source [file join $PATH lib/interface.cfg] source [file join $PATH lib/target.cfg] source [file join $PATH lib/authenticate.cfg] source [file join $PATH lib/start.cfg] ``` -------------------------------- ### Setup NEORV32 Runtime Environment Source: https://github.com/stnolting/neorv32/blob/main/docs/datasheet/software_rte.adoc Call this function at the beginning of your main function to initialize the NEORV32 runtime environment. For SMP systems, call this on each core that uses the RTE. ```c int main() { neorv32_rte_setup(); // setup NEORV32 runtime environment ... ``` -------------------------------- ### Show Makefile Help Source: https://github.com/stnolting/neorv32/blob/main/docs/userguide/building_the_documentation.adoc Run the 'help' target in the makefile to see all available build options and their outputs. ```bash neorv32/docs$ make help ``` -------------------------------- ### Process File-List Files in TCL Script Source: https://github.com/stnolting/neorv32/blob/main/docs/datasheet/overview.adoc This example demonstrates how to process the NEORV32 file-list files using a TCL script. It reads the file content and substitutes the path placeholder with the actual NEORV32 installation path. ```tcl set file_list_file [read [open "$neorv32_home/rtl/file_list_soc.f" r]] set file_list [string map [list "NEORV32_RTL_PATH_PLACEHOLDER" "$neorv32_home/rtl"] $file_list_file] puts "NEORV32 source files:" puts $file_list ``` -------------------------------- ### NEORV32 Bootloader Help Menu Source: https://github.com/stnolting/neorv32/blob/main/docs/datasheet/software_bootloader.adoc Displays the available commands in the NEORV32 bootloader, including options for system information, uploading firmware, and managing flash memory. ```text CMD:> h Available CMDs: h: Help <1> i: System info <2> r: Restart <3> u: Upload via UART <4> t: TWI flash - load <5> w: TWI flash - program <6> l: SPI flash - load <7> s: SPI flash - program <8> c: SD card - load <9> e: Start executable <10> x: Exit <11> CMD:> ``` -------------------------------- ### Verify Yosys and GHDL Plugin Installation Source: https://github.com/stnolting/neorv32/blob/main/docs/userguide/litex_support.adoc Run this command in your terminal to check if yosys is installed and recognizes the GHDL plugin. This is crucial for VHDL synthesis within the LiteX build flow. ```bash yosys -H ``` -------------------------------- ### Setup and Use Watchdog Timer (WDT) Source: https://context7.com/stnolting/neorv32/llms.txt Initializes the WDT, checks the cause of the last reset, and sets a timeout period. The watchdog must be fed periodically to prevent a system reset. Ensure the WDT is available before use. ```c #include int main() { neorv32_rte_setup(); neorv32_uart0_setup(19200, 0); if (neorv32_wdt_available() == 0) { return -1; } // Check cause of last reset int cause = neorv32_wdt_get_cause(); switch (cause) { case WDT_RCAUSE_EXT: neorv32_uart0_puts("Last reset: External\n"); break; case WDT_RCAUSE_OCD: neorv32_uart0_puts("Last reset: Debugger\n"); break; case WDT_RCAUSE_TMO: neorv32_uart0_puts("Last reset: WDT Timeout\n"); break; case WDT_RCAUSE_ACC: neorv32_uart0_puts("Last reset: WDT Invalid Access\n"); break; } // Calculate timeout: WDT runs at f_main/4096 // For 8 second timeout: uint32_t timeout = 8 * (neorv32_sysinfo_get_clk() / 4096); // Setup watchdog: timeout value, no lock (0) // Lock=1 prevents further configuration changes neorv32_wdt_setup(timeout, 0); // Main application loop while (1) { // Application processing... neorv32_aux_delay_ms(neorv32_sysinfo_get_clk(), 500); // Feed watchdog to prevent reset (use password) neorv32_wdt_feed(WDT_PASSWORD); neorv32_uart0_puts("WDT fed.\n"); } // Force immediate hardware reset // neorv32_wdt_force_hwreset(); // Disable watchdog (only if not locked) // neorv32_wdt_disable(); return 0; } ``` -------------------------------- ### Install Custom Trap Handlers Source: https://github.com/stnolting/neorv32/blob/main/docs/datasheet/software_rte.adoc Installs custom handlers for machine timer interrupts, machine environment calls, and SLINK receive interrupts. Ensure the handler functions are defined elsewhere. ```c neorv32_rte_handler_install(RTE_TRAP_MTI, machine_timer_irq_handler); // handler for machine timer interrupt neorv32_rte_handler_install(RTE_TRAP_MENV_CALL, environment_call_handler); // handler for machine environment call exception neorv32_rte_handler_install(SLINK_RX_RTE_ID, slink_rx_handler); // handler for SLINK receive interrupt ``` -------------------------------- ### VHDL Tristate Driver Example for TWD Module Source: https://github.com/stnolting/neorv32/blob/main/docs/datasheet/soc_twd.adoc Example VHDL code demonstrating how to implement the tristate driver for the SDA line required by the TWD module. The SCL line only requires an input. ```VHDL -- IO ports / bus lines -- sda_io : inout std_logic; scl_io : in std_logic; -- tristate driver -- sda_io <= '0' when (twd_sda_o = '0') else 'Z'; -- sense -- twd_sda_i <= std_ulogic(sda_io); twd_scl_i <= std_ulogic(scl_io); ``` -------------------------------- ### Configure Application Makefile Source: https://github.com/stnolting/neorv32/blob/main/docs/datasheet/software.adoc Override default build configurations such as CPU ISA, GCC prefix, optimization level, and debug symbols. This example also shows how to define processor memory sizes and base addresses, and heap size using linker flags. ```makefile # Override the default CPU ISA MARCH = rv32imc_zicsr_zifencei # Override the default RISC-V GCC prefix RISCV_PREFIX ?= riscv-none-elf- # Override default optimization goal EFFORT = -Os # Add extended debug symbols for Eclipse USER_FLAGS += -ggdb -gdwarf-3 # Additional sources APP_SRC += $(wildcard ./*.c) APP_INC += -I . # Adjust processor IMEM size and base address USER_FLAGS += -Wl,--defsym,__neorv32_rom_size=16k USER_FLAGS += -Wl,--defsym,__neorv32_rom_base=0x00000000 # Adjust processor DMEM size and base address USER_FLAGS += -Wl,--defsym,__neorv32_ram_size=8k USER_FLAGS += -Wl,--defsym,__neorv32_ram_base=0x80000000 # Adjust maximum heap size USER_FLAGS += -Wl,--defsym,__neorv32_heap_size=2k # Set path to NEORV32 root directory NEORV32_HOME ?= ../../.. ``` -------------------------------- ### Compile and Run Zfinx Performance Tests Source: https://github.com/stnolting/neorv32/blob/main/sw/example/performance_tests/Zfinx/README.md Use these make commands to clean, build, and simulate the Zfinx instruction performance tests. Ensure USER_FLAGS are set appropriately for your desired test suite. ```bash make USER_FLAGS+=-DRUN_CHECK USER_FLAGS+=-DUART0_SIM_MODE USER_FLAGS+=-Drv32Zfinx_arith clean_all exe make sim ``` -------------------------------- ### Install Application-Specific Trap Handler Source: https://github.com/stnolting/neorv32/blob/main/docs/datasheet/software_rte.adoc Use this function to install a custom trap handler. The `id` specifies the trap to handle, and `handler` is a pointer to your custom function. Custom handlers must not use the `((interrupt))` attribute. ```c int neorv32_rte_handler_install(uint8_t id, void (*handler)(void)); ``` -------------------------------- ### Start NEORV32 Program Execution Source: https://github.com/stnolting/neorv32/blob/main/docs/userguide/using_ocd.adoc Initiates the execution of the uploaded program on the NEORV32 processor. You can halt execution at any time using CTRL+c to inspect variables, set breakpoints, or step through the code. ```bash (gdb) c <5> ``` -------------------------------- ### TWI VHDL Tristate Driver Example Source: https://github.com/stnolting/neorv32/blob/main/docs/datasheet/soc_twi.adoc Example VHDL code for implementing tristate drivers for the SDA and SCL lines required by the TWI module. Ensure `sda_io` and `scl_io` are correctly connected to the actual I2C bus lines. ```vhdl sda_io <= '0' when (twi_sda_o = '0') else 'Z'; -- drive scl_io <= '0' when (twi_scl_o = '0') else 'Z'; -- drive twi_sda_i <= std_ulogic(sda_io); -- sense twi_scl_i <= std_ulogic(scl_io); -- sense ``` -------------------------------- ### Machine Counter Setup CSRs Source: https://github.com/stnolting/neorv32/blob/main/docs/datasheet/cpu_csr.adoc Configuration registers for machine-level performance counters. ```APIDOC ## `mcountinhibit` ### Description Machine counter-inhibit register. Used to halt specific counter CSRs. ### Method N/A (CSR Register) ### Endpoint N/A ### Parameters #### Path Parameters N/A #### Query Parameters N/A #### Request Body N/A ### Request Example N/A ### Response #### Success Response (200) N/A #### Response Example N/A ## `mcountinhibit` CSR Bits ### Description Defines which bits control the halting of specific counters. ### Method N/A (CSR Register Bits) ### Endpoint N/A ### Parameters N/A ### Request Example N/A ### Response N/A ## `mcyclecfg[h]` ### Description Machine cycle counter privilege mode filtering. Controls when the cycle counter is halted based on the CPU's privilege mode. `mcyclecfg` is hardwired to all-zero. ### Method N/A (CSR Register) ### Endpoint N/A ### Parameters N/A ### Request Example N/A ### Response N/A ## `mcyclecfgh` CSR Bits ### Description Defines which bits control the halting of the `mcycle[h]` counter based on privilege mode. ### Method N/A (CSR Register Bits) ### Endpoint N/A ### Parameters N/A ### Request Example N/A ### Response N/A ## `minstretcfg[h]` ### Description Machine instruction-retired counter privilege mode filtering. Controls when the instruction-retired counter is halted based on the CPU's privilege mode. `minstretcfg` is hardwired to all-zero. ### Method N/A (CSR Register) ### Endpoint N/A ### Parameters N/A ### Request Example N/A ### Response N/A ## `minstretcfgh` CSR Bits ### Description Defines which bits control the halting of the `minstret[h]` counter based on privilege mode. ### Method N/A (CSR Register Bits) ### Endpoint N/A ### Parameters N/A ### Request Example N/A ### Response N/A ``` -------------------------------- ### RTE Default Trap Handler UART0 Output Examples Source: https://github.com/stnolting/neorv32/blob/main/docs/datasheet/software_rte.adoc Examples of messages output by the default RTE trap handler to UART0, providing debug information for various trap types. These messages indicate the trap cause, program counter (MEPC), instruction details (MTINST), and trap value (MTVAL). ```text [cpu0|M] Illegal instruction MEPC=0x000002d6 MTINST=0x000000FF MTVAL=0x00000000 <1> [cpu0|U] Illegal instruction MEPC=0x00000302 MTINST=0x00000000 MTVAL=0x00000000 <2> [cpu0|U] Load address misaligned MEPC=0x00000440 MTINST=0x01052603 MTVAL=0x80000101 <3> [cpu1|M] FIRQ channel 0x00000003 MEPC=0x00000820 MTINST=0x00000000 MTVAL=0x00000000 <4> [cpu1|M] Instruction access fault MEPC=0x90000000 MTINST=0x42078b63 MTVAL=0x00000000 FATAL! HALTING CPU <5> ``` -------------------------------- ### Machine Trap Setup CSRs Source: https://github.com/stnolting/neorv32/blob/main/docs/datasheet/cpu_csr.adoc CSRs for configuring machine-mode trap and interrupt behavior. ```APIDOC ## Machine Trap Setup CSRs ### `mstatus` - **Name**: Machine status register - low word - **Address**: `0x300` - **Reset value**: `0x00000000` - **ISA**: `Zicsr` - **Description**: The `mstatus` CSR is used to configure general machine environment parameters. #### `mstatus` CSR bits | Bit | Name [C] | R/W | Function | |---|---|---|---| | 3 | `CSR_MSTATUS_MIE` | r/w | **MIE**: Machine-mode interrupt enable flag | ``` -------------------------------- ### Launch Secondary CPU Core (Core 1) - NEORV32 SMP Source: https://github.com/stnolting/neorv32/blob/main/docs/datasheet/cpu_dual_core.adoc Use this function prototype to launch the secondary CPU core (core 1) from the primary core (core 0). It requires the entry point function, stack memory, and stack size for core 1. This function can only be executed on core 0. ```c int neorv32_smp_launch(int (*entry_point)(void), uint8_t* stack_memory, size_t stack_size_bytes); ``` -------------------------------- ### Get Current Local Time Source: https://github.com/stnolting/neorv32/blob/main/docs/userguide/micropython_port.adoc The `time.localtime()` function returns the current local time as a tuple. ```python >>> import time >>> time.localtime() (2025, 4, 20, 19, 52, 46, 6, 110) ``` -------------------------------- ### Import NEORV32 Tracer GDB Script Source: https://github.com/stnolting/neorv32/blob/main/docs/datasheet/soc_tracer.adoc Source this GDB script to enable tracer commands like `tracer_get` and `tracer_start`. ```gdb (gdb) source path/to/neorv32/sw/example/demo_tracer/neorv32_tracer.gdb ```