### Define and Access Peripheral Register Blocks in Rust

Source: https://context7.com/rust-embedded/volatile-register/llms.txt

This example demonstrates defining a memory-mapped peripheral structure using #[repr(C)] and the volatile-register crate's RO, RW, and WO types. It includes utility functions to safely perform read and write operations on hardware registers based on their memory layout.

```rust
use volatile_register::{RO, RW, WO};

#[repr(C)]
pub struct Nvic {
    pub iser: [RW<u32>; 8],
    reserved0: [u32; 24],
    pub icer: [RW<u32>; 8],
    reserved1: [u32; 24],
    pub ispr: [RW<u32>; 8],
    reserved2: [u32; 24],
    pub icpr: [RW<u32>; 8],
    reserved3: [u32; 24],
    pub iabr: [RO<u32>; 8],
    reserved4: [u32; 56],
    pub ipr: [RW<u8>; 240],
    reserved5: [u8; 2576],
    pub stir: WO<u32>,
}

const NVIC_BASE: usize = 0xE000_E100;

pub unsafe fn enable_interrupt(irq: u8) {
    let nvic = NVIC_BASE as *const Nvic;
    let register_index = (irq / 32) as usize;
    let bit_position = irq % 32;
    (*nvic).iser[register_index].write(1 << bit_position);
}

pub unsafe fn set_priority(irq: u8, priority: u8) {
    let nvic = NVIC_BASE as *const Nvic;
    (*nvic).ipr[irq as usize].write(priority);
}

fn main() {
    unsafe {
        enable_interrupt(5);
        set_priority(5, 2);
    }
}
```

--------------------------------

### Implement Write-Only (WO) Hardware Registers

Source: https://context7.com/rust-embedded/volatile-register/llms.txt

Illustrates the use of the WO struct for registers where reading is unsupported or invalid. It provides a write() method for sending commands or clearing flags.

```rust
use volatile_register::WO;

#[repr(C)]
pub struct DmaController {
    pub cmd: WO<u32>,
    pub int_clear: WO<u32>,
}

const DMA_CMD_START: u32 = 0x01;
const DMA_CMD_RESET: u32 = 0x04;

let dma = 0x4002_6000 as *const DmaController;

unsafe {
    (*dma).cmd.write(DMA_CMD_START);
    (*dma).int_clear.write(0xFFFF_FFFF);
    (*dma).cmd.write(DMA_CMD_RESET);
}
```

--------------------------------

### Implement Read-Only (RO) Hardware Registers

Source: https://context7.com/rust-embedded/volatile-register/llms.txt

Demonstrates defining a peripheral register block using the RO struct. The read() method allows safe, volatile access to registers that should not be modified.

```rust
use volatile_register::RO;

#[repr(C)]
pub struct DeviceId {
    pub id: RO<u32>,
    pub revision: RO<u16>,
}

let device = 0x4000_0000 as *const DeviceId;

unsafe {
    let device_id = (*device).id.read();
    let revision = (*device).revision.read();
}
```

--------------------------------

### Implement Read-Write (RW) Hardware Registers

Source: https://context7.com/rust-embedded/volatile-register/llms.txt

Shows the usage of the RW struct for registers requiring read, write, and modify operations. The modify method provides a safe way to perform atomic read-modify-write cycles.

```rust
use volatile_register::RW;

#[repr(C)]
pub struct Gpio {
    pub odr: RW<u32>,
    pub idr: RW<u32>,
    pub moder: RW<u32>,
}

let gpio = 0x4002_0000 as *const Gpio;

unsafe {
    (*gpio).odr.write(0x0000_00FF);
    let current = (*gpio).odr.read();
    (*gpio).odr.modify(|val| val ^ (1 << 4));
    (*gpio).moder.modify(|val| val | 0x0000_0055);
}
```

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