### Install librosa Source: https://github.com/openwch/ch32h417/blob/main/EVT/EXAM/APPLICATION/LTDC_LVGL/Common/lvgl/demos/music/README.md Install the librosa library using pip3, which is required for the spectrum generation script. ```bash pip3 install librosa ``` -------------------------------- ### Performance Reporting Example Source: https://github.com/openwch/ch32h417/blob/main/EVT/EXAM/CPU/CoreMark/V5F/User/coremark/README.md Example of how to report CoreMark performance results, including iterations per second, compiler details, and memory allocation. ```text CoreMark 1.0 : 128 / GCC 4.1.2 -O2 -fprofile-use / Heap in TCRAM / FORK:2 ``` -------------------------------- ### Run Music Demo Source: https://github.com/openwch/ch32h417/blob/main/EVT/EXAM/APPLICATION/LTDC_LVGL/Common/lvgl/demos/music/README.md After initializing LVGL and its drivers, call the lv_demo_music() function to start the demo. Enable LV_DEMO_MUSIC_AUTO_PLAY for an automatic ~60 second playback. ```c lv_init(); // Initialize your drivers here #if LV_USE_DEMO_MUSIC lv_demo_music(); #endif ``` -------------------------------- ### Simplified Performance Reporting Example Source: https://github.com/openwch/ch32h417/blob/main/EVT/EXAM/CPU/CoreMark/V5F/User/coremark/README.md A simpler format for reporting CoreMark performance results when fewer parameters are applicable. ```text CoreMark 1.0 : 1400 / GCC 3.4 -O4 ``` -------------------------------- ### CoreMark/MHz Reporting Example Source: https://github.com/openwch/ch32h417/blob/main/EVT/EXAM/CPU/CoreMark/V5F/User/coremark/README.md Example of reporting CoreMark results per MHz, including memory and cache frequency ratios. ```text CoreMark/MHz 1.0 : 1.47 / GCC 4.1.2 -O2 / DDR3(Heap) 30:1 Memory 1:1 Cache ``` -------------------------------- ### CoreMark Log File Format Source: https://github.com/openwch/ch32h417/blob/main/EVT/EXAM/CPU/CoreMark/V3F/User/coremark/README.md Example log file output detailing performance run parameters, benchmark results, and validation status. ```text 2K performance run parameters for coremark. (Run type) CoreMark Size : 666 (Buffer size) Total ticks : 25875 (platform dependent value) Total time (secs) : 25.875000 (actual time in seconds) Iterations/Sec : 3864.734300 (Performance value to report) Iterations : 100000 (number of iterations used) Compiler version : GCC3.4.4 (Compiler and version) Compiler flags : -O2 (Compiler and linker flags) Memory location : Code in flash, data in on chip RAM seedcrc : 0xe9f5 (identifier for the input seeds) [0]crclist : 0xe714 (validation for list part) [0]crcmatrix : 0x1fd7 (validation for matrix part) [0]crcstate : 0x8e3a (validation for state part) [0]crcfinal : 0x33ff (iteration dependent output) Correct operation validated. See README.md for run and reporting rules. (*Only when run is successful*) CoreMark 1.0 : 6508.490622 / GCC3.4.4 -O2 / Heap (*Only on a successful performance run*) ``` -------------------------------- ### CoreMark Log File Format Source: https://github.com/openwch/ch32h417/blob/main/EVT/EXAM/CPU/CoreMark/V5F/User/coremark/README.md Example of the log file format generated by the CoreMark benchmark, showing performance metrics and validation status. ```text 2K performance run parameters for coremark. (Run type) CoreMark Size : 666 (Buffer size) Total ticks : 25875 (platform dependent value) Total time (secs) : 25.875000 (actual time in seconds) Iterations/Sec : 3864.734300 (Performance value to report) Iterations : 100000 (number of iterations used) Compiler version : GCC3.4.4 (Compiler and version) Compiler flags : -O2 (Compiler and linker flags) Memory location : Code in flash, data in on chip RAM seedcrc : 0xe9f5 (identifier for the input seeds) [0]crclist : 0xe714 (validation for list part) [0]crcmatrix : 0x1fd7 (validation for matrix part) [0]crcstate : 0x8e3a (validation for state part) [0]crcfinal : 0x33ff (iteration dependent output) Correct operation validated. See README.md for run and reporting rules. (*Only when run is successful*) CoreMark 1.0 : 6508.490622 / GCC3.4.4 -O2 / Heap (*Only on a successful performance run*) ``` -------------------------------- ### Configuring buffer size without malloc Source: https://github.com/openwch/ch32h417/blob/main/EVT/EXAM/CPU/CoreMark/V5F/User/coremark/README.md When malloc is not used or command line arguments are unsupported, define the buffer size for algorithms using TOTAL_DATA_SIZE. This example sets it to 6000 bytes and indicates that main has no arguments. ```makefile % make XCFLAGS="-DTOTAL_DATA_SIZE=6000 -DMAIN_HAS_NOARGC=1" ``` -------------------------------- ### Run Profile Guided Optimization Test Source: https://github.com/openwch/ch32h417/blob/main/EVT/EXAM/CPU/CoreMark/V3F/User/coremark/README.md Execute profile guided optimization tests using specific XCFLAGS to define total data size and profile run. ```makefile % make XCFLAGS="-DTOTAL_DATA_SIZE=1200 -DPROFILE_RUN=1" REBUILD=1 run3.log ``` -------------------------------- ### Compiling CoreMark Without Make Source: https://github.com/openwch/ch32h417/blob/main/EVT/EXAM/CPU/CoreMark/V3F/User/coremark/README.md When a 'make' utility is not available, manually compile the required source files using a C compiler like GCC. This example demonstrates compiling for a performance run with a specific number of iterations and redirecting output. ```c % gcc -O2 -o coremark.exe core_list_join.c core_main.c core_matrix.c core_state.c core_util.c simple/core_portme.c -DPERFORMANCE_RUN=1 -DITERATIONS=1000 % ./coremark.exe > run1.log ``` -------------------------------- ### Parallel Execution with Multiple Threads Source: https://github.com/openwch/ch32h417/blob/main/EVT/EXAM/CPU/CoreMark/V3F/User/coremark/README.md To run the benchmark in parallel, use the XCFLAGS make variable to specify the number of threads with the MULTITHREAD macro. This example uses POSIX Threads (pthreads). ```makefile % make XCFLAGS="-DMULTITHREAD=4 -DUSE_PTHREAD" ``` -------------------------------- ### Enable Music Demo Source: https://github.com/openwch/ch32h417/blob/main/EVT/EXAM/APPLICATION/LTDC_LVGL/Common/lvgl/demos/music/README.md Enable the music demo by setting LV_USE_DEMO_MUSIC to 1 in your lv_conf.h file. ```c #define LV_USE_DEMO_MUSIC 1 ``` -------------------------------- ### Enable LVGL Demos in lv_conf.h Source: https://github.com/openwch/ch32h417/blob/main/EVT/EXAM/APPLICATION/LTDC_LVGL/Common/lvgl/demos/README.md Configure demo usage by setting macro values in `lv_conf.h`. Ensure `LV_MEM_SIZE` is sufficient for demos like Widgets. ```c /*=================== * DEMO USAGE ====================*/ /*Show some widget. It might be required to increase `LV_MEM_SIZE` */ #define LV_USE_DEMO_WIDGETS 0 #if LV_USE_DEMO_WIDGETS #define LV_DEMO_WIDGETS_SLIDESHOW 0 #endif /*Demonstrate the usage of encoder and keyboard*/ #define LV_USE_DEMO_KEYPAD_AND_ENCODER 0 /*Benchmark your system*/ #define LV_USE_DEMO_BENCHMARK 0 /*Stress test for LVGL*/ #define LV_USE_DEMO_STRESS 0 /*Music player demo*/ #define LV_USE_DEMO_MUSIC 0 #if LV_USE_DEMO_MUSIC # define LV_DEMO_MUSIC_SQUARE 0 # define LV_DEMO_MUSIC_LANDSCAPE 0 # define LV_DEMO_MUSIC_ROUND 0 # define LV_DEMO_MUSIC_LARGE 0 # define LV_DEMO_MUSIC_AUTO_PLAY 0 #endif ``` -------------------------------- ### Create and Configure a Button with Label in C Source: https://github.com/openwch/ch32h417/blob/main/EVT/EXAM/APPLICATION/LTDC_LVGL/Common/lvgl/README.md This C code snippet demonstrates how to create a button, set its position and size, assign a click event callback, and add a centered label to it. It's useful for basic button interaction in LVGL applications. ```c lv_obj_t * btn = lv_btn_create(lv_scr_act()); /*Add a button to the current screen*/ lv_obj_set_pos(btn, 10, 10); /*Set its position*/ lv_obj_set_size(btn, 100, 50); /*Set its size*/ lv_obj_add_event_cb(btn, btn_event_cb, LV_EVENT_CLICKED, NULL); /*Assign a callback to the button*/ lv_obj_t * label = lv_label_create(btn); /*Add a label to the button*/ lv_label_set_text(label, "Button"); /*Set the labels text*/ lv_obj_center(label); /*Align the label to the center*/ ... void btn_event_cb(lv_event_t * e) { printf("Clicked\n"); } ``` -------------------------------- ### Configure LV_MEM_SIZE for Widgets Demo Source: https://github.com/openwch/ch32h417/blob/main/EVT/EXAM/APPLICATION/LTDC_LVGL/Common/lvgl/demos/README.md Ensure sufficient memory is allocated for the Widgets demo by setting `LV_MEM_SIZE` to at least 38KB. ```c #define LV_MEME_SIZE (38ul * 1024ul) ``` -------------------------------- ### Include LVGL Demos Header Source: https://github.com/openwch/ch32h417/blob/main/EVT/EXAM/APPLICATION/LTDC_LVGL/Common/lvgl/demos/README.md Include the `lv_demos.h` header file in your main application source to access demo functionalities. ```c //! main.c #include "lvgl.h" #include "demos/lv_demos.h" ... ``` -------------------------------- ### Build for Performance Run Source: https://github.com/openwch/ch32h417/blob/main/EVT/EXAM/CPU/CoreMark/V5F/User/coremark/README.md Use this command to build the benchmark for a performance run, setting the performance run flag. ```makefile % make XCFLAGS="-DPERFORMANCE_RUN=1" REBUILD=1 run1.log ``` -------------------------------- ### Run Performance and Validation Tests Source: https://github.com/openwch/ch32h417/blob/main/EVT/EXAM/CPU/CoreMark/V3F/User/coremark/README.md Use these make commands to run performance and validation tests. Ensure XCFLAGS are set appropriately for each run type. ```makefile % make XCFLAGS="-DPERFORMANCE_RUN=1" REBUILD=1 run1.log % make XCFLAGS="-DVALIDATION_RUN=1" REBUILD=1 run2.log ``` -------------------------------- ### Running CoreMark with Custom Iterations Source: https://github.com/openwch/ch32h417/blob/main/EVT/EXAM/CPU/CoreMark/V3F/User/coremark/README.md To override the default benchmark run time (10-100 seconds), use the ITERATIONS make flag to specify a fixed number of iterations. This is recommended for simulators, power measurements, or when timing cannot be restarted. ```makefile % make ITERATIONS=10 ``` -------------------------------- ### Generate Spectrum Data Source: https://github.com/openwch/ch32h417/blob/main/EVT/EXAM/APPLICATION/LTDC_LVGL/Common/lvgl/demos/music/README.md Run the spectrum.py script with an MP3 file as input to generate spectrum data, which will be saved to spectrum.h. ```python python spectrum.py my_file.mp3 ``` -------------------------------- ### Create and Configure a Button with Label in MicroPython Source: https://github.com/openwch/ch32h417/blob/main/EVT/EXAM/APPLICATION/LTDC_LVGL/Common/lvgl/README.md This MicroPython code snippet shows how to create a button, set its position and size, assign a click event callback, and add a centered label. It's the MicroPython equivalent for basic button interaction in LVGL. ```python def btn_event_cb(e): print("Clicked") # Create a Button and a Label btn = lv.btn(lv.scr_act()) btn.set_pos(10, 10) btn.set_size(100, 50) btn.add_event_cb(btn_event_cb, lv.EVENT.CLICKED, None) label = lv.label(btn) label.set_text("Button") label.center() ``` -------------------------------- ### Compiling CoreMark without make Source: https://github.com/openwch/ch32h417/blob/main/EVT/EXAM/CPU/CoreMark/V5F/User/coremark/README.md Manually compile the benchmark executable by listing all required source files and using gcc. This method is for systems that do not have the 'make' utility available. ```c % gcc -O2 -o coremark.exe core_list_join.c core_main.c core_matrix.c core_state.c core_util.c simple/core_portme.c -DPERFORMANCE_RUN=1 -DITERATIONS=1000 % ./coremark.exe > run1.log ``` -------------------------------- ### Build for Validation Run Source: https://github.com/openwch/ch32h417/blob/main/EVT/EXAM/CPU/CoreMark/V5F/User/coremark/README.md Use this command to build the benchmark for a validation run, setting the validation run flag. ```makefile % make XCFLAGS="-DVALIDATION_RUN=1" REBUILD=1 run2.log ``` -------------------------------- ### Cross-Compiling CoreMark Source: https://github.com/openwch/ch32h417/blob/main/EVT/EXAM/CPU/CoreMark/V3F/User/coremark/README.md When cross-compiling for a new platform, copy an existing port directory, adjust the porting files, and specify the platform directory using the PORT_DIR make variable. ```makefile % make PORT_DIR= ``` -------------------------------- ### Run Benchmark with Disabled Flushing Source: https://github.com/openwch/ch32h417/blob/main/EVT/EXAM/APPLICATION/LTDC_LVGL/Common/lvgl/demos/benchmark/README.md Disable screen updates before running the benchmark and re-enable them via a callback when the benchmark finishes. This ensures accurate measurement of rendering performance. ```c extern void disp_enable_update(void); extern void disp_disable_update(void); static void on_benchmark_finished(void) { disp_enable_update(); } int main(void) { lv_init(); lv_port_disp_init(); lv_port_indev_init(); LV_LOG("Running LVGL Benchmark..."); LV_LOG("Please stand by..."); LV_LOG("NOTE: You will NOT see anything until the end."); disp_disable_update(); lv_demo_benchmark_set_finished_cb(&on_benchmark_finished); lv_demo_benchmark_set_max_speed(true); lv_demo_benchmark(); //lv_demo_benchmark_run_scene(43); // run scene no 31 ... while(1){ lv_timer_handler(); //! run lv task at the max speed } } ``` -------------------------------- ### Cross-compiling CoreMark Source: https://github.com/openwch/ch32h417/blob/main/EVT/EXAM/CPU/CoreMark/V5F/User/coremark/README.md When cross-compiling for a specific platform, adjust the porting files and use the PORT_DIR make variable to specify the platform directory. ```makefile % make PORT_DIR= ``` -------------------------------- ### Parallel execution with POSIX Threads Source: https://github.com/openwch/ch32h417/blob/main/EVT/EXAM/CPU/CoreMark/V5F/User/coremark/README.md Compile the benchmark for parallel execution on multiple cores using the MULTITHREAD define and specifying the threading API, such as POSIX Threads (pthread). ```makefile % make XCFLAGS="-DMULTITHREAD=4 -DUSE_PTHREAD" ``` -------------------------------- ### Project Definition for Non-ESP Platforms Source: https://github.com/openwch/ch32h417/blob/main/EVT/EXAM/APPLICATION/LTDC_LVGL/Common/lvgl/CMakeLists.txt Defines the project name and a homepage URL for LVGL when not building for an ESP platform. This helps in organizing and identifying the project. ```cmake if(NOT ESP_PLATFORM) project(lvgl HOMEPAGE_URL https://github.com/lvgl/lvgl) endif() ``` -------------------------------- ### Configuring Buffer Size Without Malloc Source: https://github.com/openwch/ch32h417/blob/main/EVT/EXAM/CPU/CoreMark/V3F/User/coremark/README.md If malloc is not used or command-line arguments are unsupported, define TOTAL_DATA_SIZE via a compiler flag to set the input data buffer size. The default is 2000 bytes for standard runs. ```makefile % make XCFLAGS="-DTOTAL_DATA_SIZE=6000 -DMAIN_HAS_NOARGC=1" ``` -------------------------------- ### Running CoreMark with custom iterations Source: https://github.com/openwch/ch32h417/blob/main/EVT/EXAM/CPU/CoreMark/V5F/User/coremark/README.md Override the default benchmark run time by specifying the number of iterations using the ITERATIONS make flag. This is useful for simulators, power measurements, or when timing cannot be restarted. ```makefile % make ITERATIONS=10 ``` -------------------------------- ### Forcing a Rebuild of the Executable Source: https://github.com/openwch/ch32h417/blob/main/EVT/EXAM/CPU/CoreMark/V3F/User/coremark/README.md Use the REBUILD make target to force a complete rebuild of the benchmark executable, even if files have not changed. ```makefile % make REBUILD ``` -------------------------------- ### Report CoreMark Performance Results Source: https://github.com/openwch/ch32h417/blob/main/EVT/EXAM/CPU/CoreMark/V3F/User/coremark/README.md Format for reporting CoreMark performance results, including iterations per second, compiler details, and memory allocation specifics. ```text CoreMark 1.0 : N / C [/ P] [/ M] N - Number of iterations per second with seeds 0,0,0x66,size=2000) C - Compiler version and flags P - Parameters such as data and code allocation specifics * This parameter *may* be omitted if all data was allocated on the heap in RAM. * This parameter *may not* be omitted when reporting CoreMark/MHz M - Type of parallel execution (if used) and number of contexts * This parameter may be omitted if parallel execution was not used. e.g.: CoreMark 1.0 : 128 / GCC 4.1.2 -O2 -fprofile-use / Heap in TCRAM / FORK:2 or CoreMark 1.0 : 1400 / GCC 3.4 -O4 ``` -------------------------------- ### Report CoreMark/MHz Scaling Results Source: https://github.com/openwch/ch32h417/blob/main/EVT/EXAM/CPU/CoreMark/V3F/User/coremark/README.md Format for reporting CoreMark per MHz scaling results, including memory and cache frequency ratios. ```text CoreMark/MHz 1.0 : N / C / P [/ M] P - When reporting scaling results, memory parameter must also indicate memory frequency:core frequency ratio. 1. If the core has cache and cache frequency to core frequency ratio is configurable, that must also be included. e.g.: CoreMark/MHz 1.0 : 1.47 / GCC 4.1.2 -O2 / DDR3(Heap) 30:1 Memory 1:1 Cache ``` -------------------------------- ### Enabling CoreMark Debug Mode Source: https://github.com/openwch/ch32h417/blob/main/EVT/EXAM/CPU/CoreMark/V3F/User/coremark/README.md Define CORE_DEBUG=1 using XCFLAGS to compile for a debug run, which can help diagnose incorrect CRC values. ```makefile % make XCFLAGS="-DCORE_DEBUG=1" ``` -------------------------------- ### Conditional Environment CMake Includes Source: https://github.com/openwch/ch32h417/blob/main/EVT/EXAM/APPLICATION/LTDC_LVGL/Common/lvgl/CMakeLists.txt Includes environment-specific CMake scripts based on the defined platform variables (ESP_PLATFORM, ZEPHYR_BASE, MICROPY_DIR). This allows for tailored build configurations for different embedded systems. ```cmake if(ESP_PLATFORM) include(${CMAKE_CURRENT_LIST_DIR}/env_support/cmake/esp.cmake) elseif(ZEPHYR_BASE) include(${CMAKE_CURRENT_LIST_DIR}/env_support/cmake/zephyr.cmake) elseif(MICROPY_DIR) include(${CMAKE_CURRENT_LIST_DIR}/env_support/cmake/micropython.cmake) else() include(${CMAKE_CURRENT_LIST_DIR}/env_support/cmake/custom.cmake) endif() ``` -------------------------------- ### Enabling debug mode with CORE_DEBUG Source: https://github.com/openwch/ch32h417/blob/main/EVT/EXAM/CPU/CoreMark/V5F/User/coremark/README.md Define CORE_DEBUG=1 using XCFLAGS to compile for a debug run, which can help in diagnosing incorrect CRC values. ```makefile % make XCFLAGS="-DCORE_DEBUG=1" ``` -------------------------------- ### Control LCD Flushing in disp_flush Source: https://github.com/openwch/ch32h417/blob/main/EVT/EXAM/APPLICATION/LTDC_LVGL/Common/lvgl/demos/benchmark/README.md Use a flag to control whether the screen is updated when disp_flush is called. This helps in isolating LVGL rendering performance from LCD latency. ```c volatile bool disp_flush_enabled = true; /* Enable updating the screen (the flushing process) when disp_flush() is called by LVGL */ void disp_enable_update(void) { disp_flush_enabled = true; } /* Disable updating the screen (the flushing process) when disp_flush() is called by LVGL */ void disp_disable_update(void) { disp_flush_enabled = false; } static void disp_flush(lv_disp_drv_t * disp_drv, const lv_area_t * area, lv_color_t * color_p) { if(disp_flush_enabled) { GLCD_DrawBitmap(area->x1, //!< x area->y1, //!< y area->x2 - area->x1 + 1, //!< width area->y2 - area->y1 + 1, //!< height (const uint8_t *)color_p); } /*IMPORTANT!!! *Inform the graphics library that you are ready with the flushing*/ lv_disp_flush_ready(disp_drv); } ``` -------------------------------- ### Set Minimum CMake Version Source: https://github.com/openwch/ch32h417/blob/main/EVT/EXAM/APPLICATION/LTDC_LVGL/Common/lvgl/CMakeLists.txt Specifies the minimum required version of CMake for the project. Ensure your CMake version meets this requirement. ```cmake cmake_minimum_required(VERSION 3.12.4) ``` -------------------------------- ### Linked List Data Structures Source: https://github.com/openwch/ch32h417/blob/main/EVT/EXAM/CPU/CoreMark/V3F/User/coremark/README.md Defines the structures for a linked list used in the CoreMark benchmark, including data and head nodes. This structure is realistic for embedded applications managing memory directly. ```c typedef struct list_data_s { ee_s16 data16; ee_s16 idx; } list_data; typedef struct list_head_s { struct list_head_s *next; struct list_data_s *info; } list_head; ```