### Configure System Clock and PLL Source: https://context7.com/mmatsnev/hc32f4a0/llms.txt Sets up the system clock by configuring the external crystal oscillator and the Phase-Locked Loop (PLL). This function must be called before enabling peripheral clocks or starting timers. It configures the system clock to 240MHz. ```c #include "hc32_ddl.h" void SystemClockConfig(void) { stc_clk_xtal_init_t stcXtalInit; stc_clk_pllh_init_t stcPLLHInit; /* Unlock PWC and CLK registers */ PWC_Unlock(PWC_UNLOCK_CODE_0 | PWC_UNLOCK_CODE_1 | PWC_UNLOCK_CODE_2); /* Configure external crystal oscillator (8MHz) */ CLK_XtalStrucInit(&stcXtalInit); stcXtalInit.u8XtalState = CLK_XTAL_ON; stcXtalInit.u8XtalDrv = CLK_XTALDRV_LOW; stcXtalInit.u8XtalMode = CLK_XTALMODE_OSC; stcXtalInit.u8XtalStb = CLK_XTALSTB_499US; CLK_XtalInit(&stcXtalInit); /* Configure PLL: (8MHz / 1) * 60 / 2 = 240MHz */ CLK_PLLHStrucInit(&stcPLLHInit); stcPLLHInit.u8PLLState = CLK_PLLH_ON; stcPLLHInit.PLLCFGR_f.PLLM = 1U - 1U; /* M = 1 */ stcPLLHInit.PLLCFGR_f.PLLN = 60U - 1U; /* N = 60 */ stcPLLHInit.PLLCFGR_f.PLLP = 2U - 1U; /* P = 2, PLLHP = 240MHz */ stcPLLHInit.PLLCFGR_f.PLLQ = 4U - 1U; /* Q = 4, PLLHQ = 120MHz */ stcPLLHInit.PLLCFGR_f.PLLR = 4U - 1U; /* R = 4, PLLHR = 120MHz */ CLK_PLLHInit(&stcPLLHInit); /* Wait for PLL stable */ while (Set != CLK_GetStableStatus(CLK_FLAG_PLLHSTB)); /* Configure bus clock dividers */ CLK_ClkDiv(CLK_CATE_ALL, (CLK_PCLK0_DIV1 | CLK_PCLK1_DIV2 | CLK_PCLK2_DIV4 | CLK_PCLK3_DIV4 | CLK_PCLK4_DIV2 | CLK_EXCLK_DIV2 | CLK_HCLK_DIV1)); /* Switch system clock to PLLH */ CLK_SetSysClkSrc(CLK_SYSCLKSOURCE_PLLH); } ``` -------------------------------- ### Configure GPIO Pin as Output Source: https://context7.com/mmatsnev/hc32f4a0/llms.txt Configures a GPIO pin as an output, sets initial state, drive strength, and output type. GPIO registers must be unlocked before configuration and locked afterward. This is useful for controlling LEDs or other output devices. ```c #include "hc32_ddl.h" /* Define LED pin */ #define LED_PORT (GPIO_PORT_C) #define LED_PIN (GPIO_PIN_09) int32_t main(void) { stc_gpio_init_t stcGpioInit; /* Unlock GPIO registers for configuration */ GPIO_Unlock(); /* Initialize GPIO structure with default values */ GPIO_StructInit(&stcGpioInit); /* Configure pin settings */ stcGpioInit.u16PinState = PIN_STATE_RESET; /* Initial state low */ stcGpioInit.u16PinDir = PIN_DIR_OUT; /* Output direction */ stcGpioInit.u16PinDrv = PIN_DRV_HIGH; /* High drive strength */ stcGpioInit.u16PinOType = PIN_OTYPE_CMOS; /* CMOS output */ stcGpioInit.u16PullUp = PIN_PU_OFF; /* No pull-up */ /* Initialize the GPIO pin */ GPIO_Init(LED_PORT, LED_PIN, &stcGpioInit); /* Lock GPIO registers */ GPIO_Lock(); /* Enable output */ GPIO_OE(LED_PORT, LED_PIN, Enable); /* Toggle LED in main loop */ while (1) { GPIO_SetPins(LED_PORT, LED_PIN); /* LED ON */ DDL_DelayMS(500UL); GPIO_ResetPins(LED_PORT, LED_PIN); /* LED OFF */ DDL_DelayMS(500UL); GPIO_TogglePins(LED_PORT, LED_PIN); /* Toggle state */ DDL_DelayMS(500UL); } } ``` -------------------------------- ### Configure and Acquire ADC Data Source: https://context7.com/mmatsnev/hc32f4a0/llms.txt Configures ADC1 for 12-bit single-shot acquisition on channels 0, 1, and 2. Includes pin initialization, clock enabling, and basic conversion loop with voltage calculation. Ensure analog pins are correctly configured. ```c #include "hc32_ddl.h" #define ADC_UNIT (M4_ADC1) #define ADC_PERIP_CLK (PWC_FCG3_ADC1) #define ADC_CH (ADC_CH0 | ADC_CH1 | ADC_CH2) #define ADC_CH_COUNT (3U) #define ADC_VREF (3.3f) #define ADC_RESOLUTION (4096U) /* 12-bit */ static uint16_t u16AdcValues[ADC_CH_COUNT]; void AdcConfig(void) { stc_adc_init_t stcAdcInit; stc_gpio_init_t stcGpioInit; uint8_t au8SampleTime[] = {30, 30, 30}; /* Sample time for each channel */ /* Configure ADC pins as analog inputs */ GPIO_Unlock(); GPIO_StructInit(&stcGpioInit); stcGpioInit.u16PinAttr = PIN_ATTR_ANALOG; GPIO_Init(GPIO_PORT_A, GPIO_PIN_00 | GPIO_PIN_01 | GPIO_PIN_02, &stcGpioInit); GPIO_Lock(); /* Enable ADC peripheral clock */ PWC_Fcg3PeriphClockCmd(ADC_PERIP_CLK, Enable); /* Initialize ADC structure */ ADC_StructInit(&stcAdcInit); stcAdcInit.u16ScanMode = ADC_MODE_SA_SSHOT; /* Single shot mode */ stcAdcInit.u16Resolution = ADC_RESOLUTION_12BIT; /* 12-bit resolution */ stcAdcInit.u16DataAlign = ADC_DATA_ALIGN_RIGHT; /* Right alignment */ stcAdcInit.u16AutoClrCmd = ADC_AUTO_CLR_DISABLE; /* Initialize ADC */ ADC_Init(ADC_UNIT, &stcAdcInit); /* Configure ADC channels for sequence A */ ADC_ChannelCmd(ADC_UNIT, ADC_SEQ_A, ADC_CH, au8SampleTime, Enable); /* Optional: Enable averaging (8 samples) */ ADC_AvgChannelConfig(ADC_UNIT, ADC_AVG_CNT_8); ADC_AvgChannelCmd(ADC_UNIT, ADC_CH, Enable); } int32_t main(void) { float fVoltage; /* Unlock peripheral registers */ GPIO_Unlock(); PWC_Unlock(PWC_UNLOCK_CODE_0 | PWC_UNLOCK_CODE_1); AdcConfig(); while (1) { /* Start conversion and wait for completion (polling mode) */ if (Ok == ADC_PollingSA(ADC_UNIT, u16AdcValues, ADC_CH_COUNT, 100U)) { /* Calculate voltage from ADC value */ fVoltage = ((float)u16AdcValues[0] * ADC_VREF) / (float)ADC_RESOLUTION; /* Process voltage value... */ } DDL_DelayMS(100U); } } ``` -------------------------------- ### Configure SPI Master Source: https://context7.com/mmatsnev/hc32f4a0/llms.txt Initializes SPI1 as a 4-wire, full-duplex master with 8-bit data size and Mode 0. Ensure the correct peripheral clock is enabled. ```c #include "hc32_ddl.h" #define SPI_MASTER_UNIT (M4_SPI1) #define SPI_SLAVE_UNIT (M4_SPI2) #define BUF_LENGTH (128U) static char u8TxBuf[BUF_LENGTH] = "SPI test data: Hello World!"; static char u8RxBuf[BUF_LENGTH]; void SpiMasterInit(void) { stc_spi_init_t stcSpiInit; /* Enable SPI peripheral clock */ PWC_Fcg1PeriphClockCmd(PWC_FCG1_SPI1, Enable); /* De-initialize SPI */ SPI_DeInit(SPI_MASTER_UNIT); /* Configure SPI initialization structure */ SPI_StructInit(&stcSpiInit); stcSpiInit.u32WireMode = SPI_WIRE_4; /* 4-wire mode */ stcSpiInit.u32TransMode = SPI_FULL_DUPLEX; /* Full duplex */ stcSpiInit.u32MasterSlave = SPI_MASTER; /* Master mode */ stcSpiInit.u32SuspMode = SPI_COM_SUSP_FUNC_OFF; stcSpiInit.u32Modfe = SPI_MODFE_DISABLE; stcSpiInit.u32Parity = SPI_PARITY_INVALID; stcSpiInit.u32SpiMode = SPI_MODE_0; /* CPOL=0, CPHA=0 */ stcSpiInit.u32BaudRatePrescaler = SPI_BR_PCLK1_DIV256; /* Baud rate divisor */ stcSpiInit.u32DataBits = SPI_DATA_SIZE_8BIT; /* 8-bit data */ stcSpiInit.u32FirstBit = SPI_FIRST_MSB; /* MSB first */ SPI_Init(SPI_MASTER_UNIT, &stcSpiInit); SPI_FunctionCmd(SPI_MASTER_UNIT, Enable); } ``` -------------------------------- ### I2C Master Communication Implementation Source: https://context7.com/mmatsnev/hc32f4a0/llms.txt Provides functions to initialize the I2C peripheral and perform read/write operations with timeout support. Requires the hc32_ddl.h header. ```c #include "hc32_ddl.h" #define I2C_UNIT (M4_I2C1) #define I2C_BAUDRATE (400000UL) /* 400kHz fast mode */ #define DEVICE_ADDR (0x50U) /* 7-bit device address */ #define TIMEOUT (0x24000U) /* I2C pin definitions */ #define I2C_SCL_PORT (GPIO_PORT_D) #define I2C_SCL_PIN (GPIO_PIN_03) #define I2C_SDA_PORT (GPIO_PORT_F) #define I2C_SDA_PIN (GPIO_PIN_10) en_result_t I2C_MasterInit(void) { stc_i2c_init_t stcI2cInit; stc_gpio_init_t stcGpioInit; float32_t fErr; /* Configure I2C pins */ GPIO_Unlock(); GPIO_StructInit(&stcGpioInit); GPIO_Init(I2C_SCL_PORT, I2C_SCL_PIN, &stcGpioInit); GPIO_Init(I2C_SDA_PORT, I2C_SDA_PIN, &stcGpioInit); GPIO_SetFunc(I2C_SCL_PORT, I2C_SCL_PIN, GPIO_FUNC_49_I2C1_SCL, PIN_SUBFUNC_DISABLE); GPIO_SetFunc(I2C_SDA_PORT, I2C_SDA_PIN, GPIO_FUNC_48_I2C1_SDA, PIN_SUBFUNC_DISABLE); GPIO_Lock(); /* Enable I2C peripheral clock */ PWC_Fcg1PeriphClockCmd(PWC_FCG1_IIC1, Enable); /* Initialize I2C */ I2C_DeInit(I2C_UNIT); I2C_StructInit(&stcI2cInit); stcI2cInit.u32Baudrate = I2C_BAUDRATE; stcI2cInit.u32SclTime = 5U; /* SCL rise/fall time */ stcI2cInit.u32I2cClkDiv = I2C_CLK_DIV4; /* Clock divider */ en_result_t enRet = I2C_Init(I2C_UNIT, &stcI2cInit, &fErr); if (Ok == enRet) { I2C_Cmd(I2C_UNIT, Enable); } return enRet; } en_result_t I2C_WriteData(uint8_t *pData, uint32_t u32Len) { en_result_t enRet; /* Generate START condition */ enRet = I2C_Start(I2C_UNIT, TIMEOUT); if (Ok != enRet) return enRet; /* Send device address with write flag */ enRet = I2C_SendAddr(I2C_UNIT, (DEVICE_ADDR << 1U) | 0x00U, TIMEOUT); if (Ok != enRet) return enRet; /* Send data */ enRet = I2C_SendData(I2C_UNIT, pData, u32Len, TIMEOUT); if (Ok != enRet) return enRet; /* Generate STOP condition */ enRet = I2C_Stop(I2C_UNIT, TIMEOUT); return enRet; } en_result_t I2C_ReadData(uint8_t *pData, uint32_t u32Len) { en_result_t enRet; /* Generate START condition */ enRet = I2C_Start(I2C_UNIT, TIMEOUT); if (Ok != enRet) return enRet; /* Send device address with read flag */ enRet = I2C_SendAddr(I2C_UNIT, (DEVICE_ADDR << 1U) | 0x01U, TIMEOUT); if (Ok != enRet) return enRet; /* Receive data */ enRet = I2C_RcvData(I2C_UNIT, pData, u32Len, TIMEOUT); if (Ok != enRet) return enRet; /* Generate STOP condition */ enRet = I2C_Stop(I2C_UNIT, TIMEOUT); return enRet; } ``` -------------------------------- ### Configure TMR6 for PWM Generation Source: https://context7.com/mmatsnev/hc32f4a0/llms.txt Configures the TMR6 timer module for complementary PWM output. Ensure TMR6 peripheral clock is enabled before calling this function. Sets up PWM output pins, base counter, period, and compare values. ```c #include "hc32_ddl.h" #define TMR6_UNIT (M4_TMR6_1) #define TMR6_PERIOD (10000U) /* PWM period */ #define TMR6_CMP_A (5000U) /* 50% duty cycle */ void Tmr6PwmConfig(void) { stc_tmr6_basecnt_cfg_t stcTmr6BaseCntCfg; stc_tmr6_port_output_cfg_t stcTmr6PortOutCfg; stc_gpio_init_t stcGpioInit; /* Enable TMR6 peripheral clock */ PWC_Fcg2PeriphClockCmd(PWC_FCG2_TMR6_1, Enable); /* Configure PWM output pins */ GPIO_Unlock(); GPIO_StructInit(&stcGpioInit); stcGpioInit.u16PinDrv = PIN_DRV_HIGH; GPIO_Init(GPIO_PORT_A, GPIO_PIN_08, &stcGpioInit); /* TIM61_PWMA */ GPIO_SetFunc(GPIO_PORT_A, GPIO_PIN_08, GPIO_FUNC_3_TIM61_PWMA, PIN_SUBFUNC_DISABLE); GPIO_Lock(); /* Initialize TMR6 base counter */ TMR6_BaseCntStructInit(&stcTmr6BaseCntCfg); stcTmr6BaseCntCfg.u32CntMode = TMR6_MODE_SAWTOOTH; /* Sawtooth wave mode */ stcTmr6BaseCntCfg.u32CntDir = TMR6_CNT_INCREASE; /* Count up */ stcTmr6BaseCntCfg.u32CntClkDiv = TMR6_CLK_PCLK0_DIV1; /* Clock divider */ stcTmr6BaseCntCfg.u32CntStpAftOvf = TMR6_CNT_CONTINUOUS; /* Continuous counting */ TMR6_Init(TMR6_UNIT, &stcTmr6BaseCntCfg); /* Set period and compare values */ TMR6_SetPeriodReg(TMR6_UNIT, TMR6_PERIOD_REG_A, TMR6_PERIOD); TMR6_SetGenCmpReg(TMR6_UNIT, TMR6_CMP_REG_A, TMR6_CMP_A); /* Configure PWM output */ TMR6_PortOutputStructInit(&stcTmr6PortOutCfg); stcTmr6PortOutCfg.u32PortMode = TMR6_PORT_COMPARE_OUTPUT; stcTmr6PortOutCfg.u32NextPeriodForceSta = TMR6_PORT_OUTPUT_STA_LOW; stcTmr6PortOutCfg.u32DownCntMatchAnotherCmpRegSta = TMR6_PORT_OUTPUT_STA_HOLD; stcTmr6PortOutCfg.u32UpCntMatchAnotherCmpRegSta = TMR6_PORT_OUTPUT_STA_HOLD; stcTmr6PortOutCfg.u32DownCntMatchCmpRegSta = TMR6_PORT_OUTPUT_STA_LOW; stcTmr6PortOutCfg.u32UpCntMatchCmpRegSta = TMR6_PORT_OUTPUT_STA_HIGH; TMR6_PortOutputConfig(TMR6_UNIT, TMR6_IO_PWMA, &stcTmr6PortOutCfg); /* Start TMR6 */ TMR6_CountCmd(TMR6_UNIT, Enable); } ``` -------------------------------- ### DMA Configuration for Memory-to-Peripheral Transfer Source: https://context7.com/mmatsnev/hc32f4a0/llms.txt Configures the DMA controller for automated data transfers between memory buffers. Requires enabling the DMA and AOS peripheral clocks. ```c #include "hc32_ddl.h" #define DMA_UNIT (M4_DMA1) #define DMA_CH (DMA_CH0) #define DMA_TRIG_EVT (EVT_AOS_STRG) /* Software trigger */ static uint32_t u32SrcBuf[256]; static uint32_t u32DstBuf[256]; void DmaConfig(void) { stc_dma_init_t stcDmaInit; stc_dma_rpt_init_t stcDmaRptInit; /* Enable DMA peripheral clock */ PWC_Fcg0PeriphClockCmd(PWC_FCG0_DMA1, Enable); /* Enable DMA and AOS clocks */ PWC_Fcg0PeriphClockCmd(PWC_FCG0_AOS, Enable); /* Initialize DMA structure */ DMA_StructInit(&stcDmaInit); stcDmaInit.u32IntEn = DMA_INT_ENABLE; /* Enable transfer complete interrupt */ stcDmaInit.u32SrcAddr = (uint32_t)u32SrcBuf; /* Source address */ stcDmaInit.u32DestAddr = (uint32_t)u32DstBuf; /* Destination address */ stcDmaInit.u32DataWidth = DMA_DATAWIDTH_32BIT; /* 32-bit transfer */ stcDmaInit.u32BlockSize = 1U; /* Block size */ stcDmaInit.u32TransCnt = 256U; /* Transfer count */ stcDmaInit.u32SrcInc = DMA_SRC_ADDR_INC; /* Source address increment */ stcDmaInit.u32DestInc = DMA_DEST_ADDR_INC; /* Destination address increment */ /* Initialize DMA channel */ DMA_Init(DMA_UNIT, DMA_CH, &stcDmaInit); /* Set DMA trigger source */ DMA_SetTriggerSrc(DMA_UNIT, DMA_CH, DMA_TRIG_EVT); /* Enable DMA channel */ DMA_ChannelCmd(DMA_UNIT, DMA_CH, Enable); /* Enable DMA unit */ DMA_Cmd(DMA_UNIT, Enable); } void StartDmaTransfer(void) { /* Trigger DMA transfer via software */ AOS_SW_Trigger(); } ``` -------------------------------- ### Configure GPIO Pins for SPI Alternate Functions Source: https://context7.com/mmatsnev/hc32f4a0/llms.txt Assigns specific alternate functions to GPIO pins for SPI communication. Requires unlocking GPIO registers, initializing pins with appropriate drive strength and input types, and then setting the desired peripheral function using GPIO_SetFunc(). ```c #include "hc32_ddl.h" /* SPI1 pin definitions */ #define SPI_NSS_PORT (GPIO_PORT_A) #define SPI_NSS_PIN (GPIO_PIN_04) #define SPI_SCK_PORT (GPIO_PORT_A) #define SPI_SCK_PIN (GPIO_PIN_05) #define SPI_MOSI_PORT (GPIO_PORT_C) #define SPI_MOSI_PIN (GPIO_PIN_01) #define SPI_MISO_PORT (GPIO_PORT_F) #define SPI_MISO_PIN (GPIO_PIN_06) void ConfigureSpiPins(void) { stc_gpio_init_t stcGpioInit; GPIO_Unlock(); GPIO_StructInit(&stcGpioInit); /* Configure output pins with high drive capability */ stcGpioInit.u16PinDrv = PIN_DRV_HIGH; GPIO_Init(SPI_NSS_PORT, SPI_NSS_PIN, &stcGpioInit); GPIO_Init(SPI_SCK_PORT, SPI_SCK_PIN, &stcGpioInit); GPIO_Init(SPI_MOSI_PORT, SPI_MOSI_PIN, &stcGpioInit); /* Configure input pin with CMOS input type */ stcGpioInit.u16PinIType = PIN_ITYPE_CMOS; GPIO_Init(SPI_MISO_PORT, SPI_MISO_PIN, &stcGpioInit); /* Set alternate functions for SPI1 */ GPIO_SetFunc(SPI_NSS_PORT, SPI_NSS_PIN, GPIO_FUNC_19_SPI1_NSS0, PIN_SUBFUNC_DISABLE); GPIO_SetFunc(SPI_SCK_PORT, SPI_SCK_PIN, GPIO_FUNC_40_SPI1_SCK, PIN_SUBFUNC_DISABLE); GPIO_SetFunc(SPI_MOSI_PORT, SPI_MOSI_PIN, GPIO_FUNC_41_SPI1_MOSI, PIN_SUBFUNC_DISABLE); GPIO_SetFunc(SPI_MISO_PORT, SPI_MISO_PIN, GPIO_FUNC_42_SPI1_MISO, PIN_SUBFUNC_DISABLE); GPIO_Lock(); } ``` -------------------------------- ### Enable Peripheral Clocks Source: https://context7.com/mmatsnev/hc32f4a0/llms.txt Enables clocks for various peripheral modules grouped by Function Control Gate (FCG) registers. This function should be called after system clock configuration and before initializing the respective peripherals. ```c #include "hc32_ddl.h" void EnablePeripheralClocks(void) { /* FCG0: Core peripherals (DMA, AOS, etc.) */ PWC_Fcg0PeriphClockCmd(PWC_FCG0_DMA1 | PWC_FCG0_DMA2 | PWC_FCG0_AOS, Enable); /* FCG1: Communication peripherals (SPI, I2C, USART, CAN, etc.) */ PWC_Fcg1PeriphClockCmd(PWC_FCG1_SPI1 | PWC_FCG1_SPI2, Enable); PWC_Fcg1PeriphClockCmd(PWC_FCG1_IIC1 | PWC_FCG1_IIC2, Enable); PWC_Fcg1PeriphClockCmd(PWC_FCG1_USART1 | PWC_FCG1_USART2, Enable); /* FCG2: Timer peripherals */ PWC_Fcg2PeriphClockCmd(PWC_FCG2_TMR6_1 | PWC_FCG2_TMR4_1, Enable); /* FCG3: ADC peripherals */ PWC_Fcg3PeriphClockCmd(PWC_FCG3_ADC1 | PWC_FCG3_ADC2 | PWC_FCG3_ADC3, Enable); } ``` -------------------------------- ### SPI Master Transmit and Receive Data Source: https://context7.com/mmatsnev/hc32f4a0/llms.txt Performs a byte-by-byte transmit and receive operation using the configured SPI master. It polls the TX buffer empty and RX buffer full flags for synchronization. ```c void SpiTransmitReceive(void) { uint32_t i; for (i = 0UL; i < BUF_LENGTH; i++) { /* Wait for TX buffer empty */ while (Reset == SPI_GetStatus(SPI_MASTER_UNIT, SPI_FLAG_TX_BUFFER_EMPTY)); SPI_WriteDataReg(SPI_MASTER_UNIT, u8TxBuf[i]); /* Wait for RX buffer full */ while (Reset == SPI_GetStatus(SPI_MASTER_UNIT, SPI_FLAG_RX_BUFFER_FULL)); u8RxBuf[i] = (uint8_t)SPI_ReadDataReg(SPI_MASTER_UNIT); } } ``` === COMPLETE CONTENT === This response contains all available snippets from this library. No additional content exists. Do not make further requests.